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authorMichael Brown2006-05-16 17:12:06 +0200
committerMichael Brown2006-05-16 17:12:06 +0200
commit15ee09ed10d71969abeea9f578f061e096ef43d0 (patch)
treefe9465a87de8f62287474b1c2dc85516b868fbf5 /src/drivers/net/eepro100.c
parentMissed a reference to heap.h. (diff)
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Restructured PCI subsystem to fit the new device model.
Generic PCI code now handles 64-bit BARs correctly when setting "membase"; drivers should need to call pci_bar_start() only if they want to use BARs other than the first memory or I/O BAR. Split rarely-used PCI functions out into pciextra.c. Core PCI code is now 662 bytes (down from 1308 bytes in Etherboot 5.4). 284 bytes of this saving comes from the pci/pciextra split. Cosmetic changes to lots of drivers (e.g. vendor_id->vendor in order to match the names used in Linux).
Diffstat (limited to 'src/drivers/net/eepro100.c')
-rw-r--r--src/drivers/net/eepro100.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/net/eepro100.c b/src/drivers/net/eepro100.c
index 27576a61..c1ff2e76 100644
--- a/src/drivers/net/eepro100.c
+++ b/src/drivers/net/eepro100.c
@@ -791,7 +791,7 @@ static struct nic_operations eepro100_operations = {
};
-static struct pci_id eepro100_nics[] = {
+static struct pci_device_id eepro100_nics[] = {
PCI_ROM(0x8086, 0x1029, "id1029", "Intel EtherExpressPro100 ID1029"),
PCI_ROM(0x8086, 0x1030, "id1030", "Intel EtherExpressPro100 ID1030"),
PCI_ROM(0x8086, 0x1031, "82801cam", "Intel 82801CAM (ICH3) Chipset Ethernet Controller"),