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author | Michael Brown | 2006-12-06 20:51:58 +0100 |
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committer | Michael Brown | 2006-12-06 20:51:58 +0100 |
commit | d2bf7abe754543f459da9ff2a0080715bf742b67 (patch) | |
tree | 74f6e2c3060fccaa43506afd2b94ffaecd905120 /src/drivers/nvs | |
parent | Verify data after writing (diff) | |
download | ipxe-d2bf7abe754543f459da9ff2a0080715bf742b67.tar.gz ipxe-d2bf7abe754543f459da9ff2a0080715bf742b67.tar.xz ipxe-d2bf7abe754543f459da9ff2a0080715bf742b67.zip |
Added write support for three-wire devices (e.g. the RTL8139 EEPROM)
Diffstat (limited to 'src/drivers/nvs')
-rw-r--r-- | src/drivers/nvs/threewire.c | 42 |
1 files changed, 41 insertions, 1 deletions
diff --git a/src/drivers/nvs/threewire.c b/src/drivers/nvs/threewire.c index 043cc8fc..3ce2a906 100644 --- a/src/drivers/nvs/threewire.c +++ b/src/drivers/nvs/threewire.c @@ -18,6 +18,7 @@ #include <stddef.h> #include <assert.h> +#include <timer.h> #include <gpxe/threewire.h> /** @file @@ -26,7 +27,8 @@ * */ -/** Read data from three-wire device +/** + * Read data from three-wire device * * @v nvs NVS device * @v address Address from which to read @@ -46,3 +48,41 @@ int threewire_read ( struct nvs_device *nvs, unsigned int address, return bus->rw ( bus, device, THREEWIRE_READ, address, NULL, data, len ); } + +/** + * Write data to three-wire device + * + * @v nvs NVS device + * @v address Address from which to read + * @v data Data buffer + * @v len Length of data buffer + * @ret rc Return status code + */ +int threewire_write ( struct nvs_device *nvs, unsigned int address, + const void *data, size_t len ) { + struct spi_device *device = nvs_to_spi ( nvs ); + struct spi_bus *bus = device->bus; + int rc; + + assert ( bus->mode == SPI_MODE_THREEWIRE ); + + DBG ( "3wire %p writing %d bytes at %04x\n", device, len, address ); + + /* Enable device for writing */ + if ( ( rc = bus->rw ( bus, device, THREEWIRE_EWEN, + THREEWIRE_EWEN_ADDRESS, NULL, NULL, 0 ) ) != 0 ) + return rc; + + /* Write data */ + if ( ( rc = bus->rw ( bus, device, THREEWIRE_WRITE, address, + data, NULL, len ) ) != 0 ) + return rc; + + /* Our model of an SPI bus doesn't provide a mechanism for + * "assert CS, wait for MISO to become high, so just wait for + * long enough to ensure that the write has completed. + */ + mdelay ( THREEWIRE_WRITE_MDELAY ); + + return 0; +} |