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authorMichael Brown2015-04-13 15:08:09 +0200
committerMichael Brown2015-04-13 15:37:15 +0200
commit867e3ee47587592d30f6f85b72b061b671f830df (patch)
tree2e9e4a5a3503fba2272c3d007e53734bc744d715 /src/drivers/usb/xhci.c
parent[build] Rewrite parserom.pl to support multiple source files (diff)
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[xhci] Always reset root hub ports
In theory USB3 ports do not require a reset to enable the port. Experimentation shows that this is sometimes required, particularly when rerouting ports from EHCI to xHCI and switching speeds. Signed-off-by: Michael Brown <mcb30@ipxe.org>
Diffstat (limited to 'src/drivers/usb/xhci.c')
-rw-r--r--src/drivers/usb/xhci.c12
1 files changed, 5 insertions, 7 deletions
diff --git a/src/drivers/usb/xhci.c b/src/drivers/usb/xhci.c
index b6ce7444..523a1c0b 100644
--- a/src/drivers/usb/xhci.c
+++ b/src/drivers/usb/xhci.c
@@ -2954,13 +2954,11 @@ static int xhci_root_enable ( struct usb_hub *hub, struct usb_port *port ) {
uint32_t portsc;
unsigned int i;
- /* Reset port if applicable */
- if ( port->protocol < USB_PROTO_3_0 ) {
- portsc = readl ( xhci->op + XHCI_OP_PORTSC ( port->address ) );
- portsc &= XHCI_PORTSC_PRESERVE;
- portsc |= XHCI_PORTSC_PR;
- writel ( portsc, xhci->op + XHCI_OP_PORTSC ( port->address ) );
- }
+ /* Reset port */
+ portsc = readl ( xhci->op + XHCI_OP_PORTSC ( port->address ) );
+ portsc &= XHCI_PORTSC_PRESERVE;
+ portsc |= XHCI_PORTSC_PR;
+ writel ( portsc, xhci->op + XHCI_OP_PORTSC ( port->address ) );
/* Wait for port to become enabled */
for ( i = 0 ; i < XHCI_PORT_RESET_MAX_WAIT_MS ; i++ ) {