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authorMichael Brown2014-05-27 15:23:49 +0200
committerMichael Brown2014-05-27 15:49:25 +0200
commitf3d423b26b2baa3e4c3919c5a2e12d793043f354 (patch)
tree12fa70a3b0d8c94fc9e93ae623d7d3c323027847 /src/usr
parent[ipv6] Avoid potentially copying from a NULL pointer in ipv6_tx() (diff)
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[librm] Allow for the PIC interrupt vector offset to be changed
Some external code (observed with FreeBSD's bootloader) will continue to make INT 13 calls after reconfiguring the 8259 PIC to change the vector offsets for IRQs. If an IRQ (e.g. the timer IRQ) subsequently occurs while iPXE is in protected mode, this will cause a general protection fault since the corresponding IDT entry is empty. A general protection fault is INT 0x0d, which happens to overlap with the original IRQ5. We therefore do have an ISR set up to handle a general protection fault, but this ISR simply reflects the interrupt down to the real-mode INT 0x0d and then attempts to return. Since our ISR is expecting a hardware interrupt rather than a general protection fault, it doesn't remove the error code from the stack before issuing the iret instruction; it therefore attempts to return to a garbage address. Since the segment part of this address is likely to be invalid, a second general protection fault occurs. This cycle continues until we run out of stack space and triple fault. Fix by reflecting all INTs down to real mode. This actually reduces the code size by four bytes (but increases the bss size by almost 2kB). Reported-by: Brian Rak <dn@devicenull.org> Signed-off-by: Michael Brown <mcb30@ipxe.org>
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