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authorPetr Borsodi2019-01-15 14:06:19 +0100
committerMichael Brown2019-01-15 14:08:44 +0100
commitba0d5aa993df4bad28b2a6a36c10b43c7e5c33f2 (patch)
tree8900aba5da38bfbcbd2aa1c31acb426cf580fa47 /src/util/Option
parent[build] Handle R_X86_64_PLT32 from binutils 2.31 (diff)
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[pci] Correct invalid base-class/sub-class/prog-if order in PCIR
PCI Configuration Space contains fields prog-if at the offset 0x09, sub-class at the offset 0x0a and base-class at the offset 0x0b (it respects little endian). PCIR structure uses these fields in the same order. Signed-off-by: Michael Brown <mcb30@ipxe.org>
Diffstat (limited to 'src/util/Option')
-rw-r--r--src/util/Option/ROM.pm4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/util/Option/ROM.pm b/src/util/Option/ROM.pm
index 232cf16b..48d92dda 100644
--- a/src/util/Option/ROM.pm
+++ b/src/util/Option/ROM.pm
@@ -508,9 +508,9 @@ sub new {
device_list => { offset => 0x08, length => 0x02, pack => "S" },
struct_length => { offset => 0x0a, length => 0x02, pack => "S" },
struct_revision =>{ offset => 0x0c, length => 0x01, pack => "C" },
- base_class => { offset => 0x0d, length => 0x01, pack => "C" },
+ prog_intf => { offset => 0x0d, length => 0x01, pack => "C" },
sub_class => { offset => 0x0e, length => 0x01, pack => "C" },
- prog_intf => { offset => 0x0f, length => 0x01, pack => "C" },
+ base_class => { offset => 0x0f, length => 0x01, pack => "C" },
image_length => { offset => 0x10, length => 0x02, pack => "S" },
revision => { offset => 0x12, length => 0x02, pack => "S" },
code_type => { offset => 0x14, length => 0x01, pack => "C" },