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| author | Joshua Oreman | 2009-10-17 01:27:43 +0200 |
|---|---|---|
| committer | Marty Connor | 2009-10-17 02:25:17 +0200 |
| commit | 7296f1f21c442e0781e7c3efe1f1a1005cf3e385 (patch) | |
| tree | d10b9854d8a7a41c6f23ddb965284d2e78ab64a9 /src/util | |
| parent | [ath5k] Update for changes in kernel 2.6.31 (diff) | |
| download | ipxe-7296f1f21c442e0781e7c3efe1f1a1005cf3e385.tar.gz ipxe-7296f1f21c442e0781e7c3efe1f1a1005cf3e385.tar.xz ipxe-7296f1f21c442e0781e7c3efe1f1a1005cf3e385.zip | |
[ath5k] Save proper cacheline size when fixing PCI configuration
Some BIOSes set the PCI cacheline size to zero for the card; the ath5k
driver fixes it to a reasonable in PCI config space, but failed to
correct the internal value it had already read. This resulted in
divide-by-zero errors when cacheline-aligning various data structures.
Fix by setting the internal cachelsz to a sane value at the same time
as we write that value to PCI config space.
Signed-off-by: Marty Connor <mdc@etherboot.org>
Diffstat (limited to 'src/util')
0 files changed, 0 insertions, 0 deletions