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Diffstat (limited to 'src/drivers/net/marvell/atl_hw.c')
-rw-r--r--src/drivers/net/marvell/atl_hw.c79
1 files changed, 36 insertions, 43 deletions
diff --git a/src/drivers/net/marvell/atl_hw.c b/src/drivers/net/marvell/atl_hw.c
index 2dddb7187..fa7f2a9b8 100644
--- a/src/drivers/net/marvell/atl_hw.c
+++ b/src/drivers/net/marvell/atl_hw.c
@@ -2,20 +2,20 @@
*
* Marvell AQtion family network card driver, hardware-specific functions.
*
- * Copyright(C) 2017-2021 Marvell
+ * Copyright(C) 2017-2024 Marvell
*
* SPDX-License-Identifier: BSD-2-Clause
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
-
- * 1. Redistributions of source code must retain the above copyright notice,
+
+ * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO,THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR HOLDER OR
@@ -31,6 +31,7 @@
FILE_LICENCE ( BSD2 );
+#include <string.h>
#include <errno.h>
#include <stdio.h>
#include <unistd.h>
@@ -41,8 +42,7 @@ FILE_LICENCE ( BSD2 );
#include <compiler.h>
-int atl_hw_reset_flb_ ( struct atl_nic *nic )
-{
+int atl_hw_reset_flb_ ( struct atl_nic *nic ) {
uint32_t val;
int k = 0;
@@ -53,8 +53,8 @@ int atl_hw_reset_flb_ ( struct atl_nic *nic )
val = ATL_READ_REG ( ATL_GLB_NVR_PROV4 );
ATL_WRITE_REG ( val | ATL_GBL_NVR_PROV4_RESET, ATL_GLB_NVR_PROV4 );
- ATL_WRITE_REG( (ATL_READ_REG(ATL_GLB_STD_CTRL) &
- ~ATL_GLB_CTRL_RST_DIS) | ATL_GLB_STD_CTRL_RESET,
+ ATL_WRITE_REG( ( ATL_READ_REG ( ATL_GLB_STD_CTRL ) &
+ ~ATL_GLB_CTRL_RST_DIS ) | ATL_GLB_STD_CTRL_RESET,
ATL_GLB_STD_CTRL );
/* Kickstart MAC */
@@ -94,7 +94,7 @@ int atl_hw_reset_flb_ ( struct atl_nic *nic )
ATL_WRITE_REG ( ATL_GBL_MCP_SEM1_RELEASE, ATL_GLB_MCP_SEM1 );
/* Global software reset*/
- ATL_WRITE_REG ( ATL_READ_REG ( ATL_RX_CTRL ) &
+ ATL_WRITE_REG ( ATL_READ_REG ( ATL_RX_CTRL ) &
~ATL_RX_CTRL_RST_DIS, ATL_RX_CTRL );
ATL_WRITE_REG ( ATL_READ_REG ( ATL_TX_CTRL ) &
~ATL_TX_CTRL_RST_DIS, ATL_TX_CTRL );
@@ -103,7 +103,7 @@ int atl_hw_reset_flb_ ( struct atl_nic *nic )
~ATL_MAC_PHY_CTRL_RST_DIS, ATL_MAC_PHY_CTRL );
ATL_WRITE_REG ( ( ATL_READ_REG ( ATL_GLB_STD_CTRL ) &
- ~ATL_GLB_CTRL_RST_DIS) | ATL_GLB_STD_CTRL_RESET,
+ ~ATL_GLB_CTRL_RST_DIS ) | ATL_GLB_STD_CTRL_RESET,
ATL_GLB_STD_CTRL );
for (k = 0; k < 1000; k++) {
@@ -123,14 +123,13 @@ int atl_hw_reset_flb_ ( struct atl_nic *nic )
return 0;
}
-int atl_hw_reset_rbl_ ( struct atl_nic *nic )
-{
+int atl_hw_reset_rbl_ ( struct atl_nic *nic ) {
uint32_t val, rbl_status;
int k;
ATL_WRITE_REG ( ATL_GLB_CTRL2_MBOX_ERR_UP_RUN_STALL, ATL_GLB_CTRL2 );
ATL_WRITE_REG ( ATL_GBL_MCP_SEM1_RELEASE, ATL_GLB_MCP_SEM1 );
- ATL_WRITE_REG ( ATL_MIF_PWR_GATING_EN_CTRL_RESET,
+ ATL_WRITE_REG ( ATL_MIF_PWR_GATING_EN_CTRL_RESET,
ATL_MIF_PWR_GATING_EN_CTRL );
/* Alter RBL status */
@@ -141,15 +140,15 @@ int atl_hw_reset_rbl_ ( struct atl_nic *nic )
ATL_WRITE_REG ( val | ATL_GBL_NVR_PROV4_RESET, ATL_GLB_NVR_PROV4 );
/* Global software reset*/
- ATL_WRITE_REG ( ATL_READ_REG(ATL_RX_CTRL) & ~ATL_RX_CTRL_RST_DIS,
+ ATL_WRITE_REG ( ATL_READ_REG ( ATL_RX_CTRL ) & ~ATL_RX_CTRL_RST_DIS,
ATL_RX_CTRL );
- ATL_WRITE_REG ( ATL_READ_REG(ATL_TX_CTRL) & ~ATL_TX_CTRL_RST_DIS,
+ ATL_WRITE_REG ( ATL_READ_REG ( ATL_TX_CTRL ) & ~ATL_TX_CTRL_RST_DIS,
ATL_TX_CTRL );
- ATL_WRITE_REG ( ATL_READ_REG(ATL_MAC_PHY_CTRL) &
+ ATL_WRITE_REG ( ATL_READ_REG ( ATL_MAC_PHY_CTRL ) &
~ATL_MAC_PHY_CTRL_RST_DIS, ATL_MAC_PHY_CTRL );
- ATL_WRITE_REG ( (ATL_READ_REG(ATL_GLB_STD_CTRL) &
- ~ATL_GLB_CTRL_RST_DIS) | ATL_GLB_STD_CTRL_RESET,
+ ATL_WRITE_REG ( ( ATL_READ_REG ( ATL_GLB_STD_CTRL ) &
+ ~ATL_GLB_CTRL_RST_DIS ) | ATL_GLB_STD_CTRL_RESET,
ATL_GLB_STD_CTRL );
ATL_WRITE_REG ( ATL_GLB_CTRL2_MBOX_ERR_UP_RUN_NORMAL, ATL_GLB_CTRL2 );
@@ -186,8 +185,7 @@ int atl_hw_reset_rbl_ ( struct atl_nic *nic )
return 0;
}
-int atl_hw_reset ( struct atl_nic *nic )
-{
+int atl_hw_reset ( struct atl_nic *nic ) {
uint32_t boot_exit_code = 0;
uint32_t k;
int rbl_enabled;
@@ -207,22 +205,22 @@ int atl_hw_reset ( struct atl_nic *nic )
return -ENOTSUP;
}
- rbl_enabled = (boot_exit_code != 0);
+ rbl_enabled = ( boot_exit_code != 0 );
fw_ver = ATL_READ_REG ( ATL_FW_VER );
- if ( ((fw_ver >> 24) & 0xFF) >= 4 ) {
+ if ( ( ( fw_ver >> 24 ) & 0xFF ) >= 4 ) {
sem_timeout = ATL_READ_REG ( ATL_SEM_TIMEOUT );
if ( sem_timeout > ATL_SEM_MAX_TIMEOUT )
sem_timeout = ATL_SEM_MAX_TIMEOUT;
for ( k = 0; k < sem_timeout; ++k ) {
- if ( ATL_READ_REG ( ATL_GLB_MCP_SEM4) )
+ if ( ATL_READ_REG ( ATL_GLB_MCP_SEM4 ) )
break;
- mdelay (ATL_DELAY_1_MNS);
+ mdelay ( ATL_DELAY_1_MNS );
}
for ( k = 0; k < sem_timeout; ++k ) {
- if (ATL_READ_REG ( ATL_GLB_MCP_SEM5) )
+ if ( ATL_READ_REG ( ATL_GLB_MCP_SEM5 ) )
break;
mdelay ( ATL_DELAY_1_MNS );
@@ -236,35 +234,31 @@ int atl_hw_reset ( struct atl_nic *nic )
return atl_hw_reset_flb_ ( nic );
}
-int atl_hw_start ( struct atl_nic *nic )
-{
+int atl_hw_start ( struct atl_nic *nic ) {
ATL_WRITE_REG ( ATL_LINK_ADV_AUTONEG, ATL_LINK_ADV );
return 0;
}
-int atl_hw_stop ( struct atl_nic *nic )
-{
+int atl_hw_stop ( struct atl_nic *nic ) {
ATL_WRITE_REG ( ATL_SHUT_LINK, ATL_LINK_ADV );
return 0;
}
-int atl_hw_get_link ( struct atl_nic *nic )
-{
+int atl_hw_get_link ( struct atl_nic *nic ) {
return ( ATL_READ_REG ( ATL_LINK_ST) & ATL_LINK_ADV_AUTONEG ) != 0;
}
int atl_hw_read_mem ( struct atl_nic *nic, uint32_t addr, uint32_t *buffer,
- uint32_t size )
-{
+ uint32_t size ) {
uint32_t i;
for ( i = 0; i < 100; ++i ) {
- if ( ATL_READ_REG( ATL_SEM_RAM) )
+ if ( ATL_READ_REG( ATL_SEM_RAM ) )
break;
mdelay ( ATL_DELAY_1_MNS );
}
if ( i == 100 ) {
- DBGC (nic, "Semaphore Register not set\n" );
+ DBGC ( nic, "Semaphore Register not set\n" );
return -EIO;
}
@@ -280,7 +274,7 @@ int atl_hw_read_mem ( struct atl_nic *nic, uint32_t addr, uint32_t *buffer,
udelay ( ATL_DELAY_10_MNS );
}
if ( j == 10000 ) {
- DBGC (nic, "Reading from CTRL3 Register Failed\n" );
+ DBGC ( nic, "Reading from CTRL3 Register Failed\n" );
return -EIO;
}
@@ -292,14 +286,13 @@ int atl_hw_read_mem ( struct atl_nic *nic, uint32_t addr, uint32_t *buffer,
return 0;
}
-int atl_hw_get_mac ( struct atl_nic *nic, uint8_t *mac )
-{
+int atl_hw_get_mac ( struct atl_nic *nic, uint8_t *mac ) {
uint32_t mac_addr[2] = {0};
int err = 0;
uint32_t efuse_addr = ATL_READ_REG ( ATL_GLB_MCP_SP26 );
if ( efuse_addr != 0) {
- uint32_t mac_efuse_addr = efuse_addr + 40 * sizeof(uint32_t);
+ uint32_t mac_efuse_addr = efuse_addr + 40 * sizeof ( uint32_t );
err = atl_hw_read_mem ( nic, mac_efuse_addr, mac_addr, 2 );
if ( err != 0 )
return err;
@@ -307,7 +300,7 @@ int atl_hw_get_mac ( struct atl_nic *nic, uint8_t *mac )
mac_addr[0] = cpu_to_be32 ( mac_addr[0] );
mac_addr[1] = cpu_to_be32 ( mac_addr[1] );
- memcpy ( mac, (uint8_t *)mac_addr, ATL_MAC_ADDRESS_SIZE );
+ memcpy ( mac, ( uint8_t * )mac_addr, ATL_MAC_ADDRESS_SIZE );
}
return 0;
}
@@ -318,4 +311,4 @@ struct atl_hw_ops atl_hw = {
.stop = atl_hw_stop,
.get_link = atl_hw_get_link,
.get_mac = atl_hw_get_mac,
-}; \ No newline at end of file
+};