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* [build] Mark known reviewed files as permitted for UEFI Secure BootMichael Brown2026-01-1455-0/+55
* [build] Mark core files as permitted for UEFI Secure BootMichael Brown2026-01-1412-0/+12
* [build] Mark existing files as explicitly forbidden for Secure BootMichael Brown2026-01-1379-0/+115
* [intel] Add PCI ID for I219-V and -LM 24Christian I. Nilsson2025-12-151-0/+2
* [crypto] Construct signatures using ASN.1 buildersMichael Brown2025-12-011-14/+4Star
* [intel] Add PCI IDs for I225 and I226 chipsetsBert Ezendam2025-11-261-0/+7
* [pci] Allow probing permission to vary by rangeMichael Brown2025-11-252-5/+17
* [pci] Use linker tables for runtime selectable PCI APIsMichael Brown2025-11-242-2/+258
* [uart] Make baud rate a property of the UARTMichael Brown2025-11-051-4/+3Star
* [pci] Disable decoding while setting a BAR valueMichael Brown2025-10-301-0/+10
* [ena] Leave queue base address empty when creating a low latency queueMichael Brown2025-10-281-1/+4
* [ena] Limit receive queue size to work around hardware bugsMichael Brown2025-10-172-12/+5Star
* [ena] Increase transmit queue size to match receive fill levelMichael Brown2025-10-171-1/+1
* [ena] Add memory barrier after writing to on-device memoryMichael Brown2025-10-171-0/+1
* [ena] Increase receive fill levelMichael Brown2025-10-161-1/+1
* [ena] Add support for low latency transmit queuesMichael Brown2025-10-162-17/+263
* [ena] Record supported device featuresMichael Brown2025-10-162-2/+6
* [ena] Cancel uncompleted transmit buffers on closeMichael Brown2025-10-161-2/+25
* [ena] Map the on-device memory, if presentMichael Brown2025-10-152-17/+70
* [ena] Add descriptive messages for any admin queue command failuresMichael Brown2025-10-151-9/+31
* [pci] Record prefetchable memory window for PCI bridgesMichael Brown2025-10-141-5/+23
* [ena] Use pci_bar_set() to place device within bridge memory windowMichael Brown2025-10-141-1/+1
* [pci] Handle sizing of 64-bit BARsMichael Brown2025-10-142-36/+76
* [gve] Rearm interrupts unconditionally on every pollMichael Brown2025-10-101-6/+7
* [gve] Use raw DMA addresses in descriptors in DQO-QPL modeMichael Brown2025-10-102-4/+5
* [gve] Report only packet completions for the transmit ringMichael Brown2025-10-092-12/+3Star
* [gve] Use dummy interrupt to trigger completion writeback in DQO modeMichael Brown2025-10-092-3/+37
* [gve] Add missing memory barriersMichael Brown2025-10-091-0/+3
* [intelxl] Use default dummy MSI-X target addressMichael Brown2025-10-092-34/+6Star
* [pci] Map all MSI-X interrupts to a dummy target address by defaultMichael Brown2025-10-091-0/+52
* [gve] Select preferred operating modeMichael Brown2025-10-061-1/+16
* [gve] Add support for out-of-order queuesMichael Brown2025-10-062-95/+398
* [gve] Cancel pending transmissions when closing deviceMichael Brown2025-10-061-6/+20
* [bnxt] Handle link related async eventsJoseph Wong2025-10-013-30/+105
* [gve] Allow for descriptor and completion lengths to vary by modeMichael Brown2025-09-302-17/+44
* [gve] Rename GQI-specific data structures and constantsMichael Brown2025-09-302-39/+48
* [gve] Allow for out-of-order buffer consumptionMichael Brown2025-09-302-71/+106
* [gve] Add support for raw DMA addressingMichael Brown2025-09-292-6/+24
* [gve] Add concept of a queue page list base device addressMichael Brown2025-09-292-6/+27
* [gve] Set descriptor and completion ring sizes when creating queuesMichael Brown2025-09-292-5/+25
* [gve] Add concept of operating modeMichael Brown2025-09-292-0/+42
* [gve] Remove separate concept of "packet descriptor"Michael Brown2025-09-292-37/+25Star
* [gve] Parse option list returned in device descriptorMichael Brown2025-09-262-1/+79
* [bnxt] Add error recovery supportJoseph Wong2025-09-183-60/+662
* [efi] Drag in MNP driver whenever SNP driver is presentMichael Brown2025-08-271-0/+4
* [bnxt] Update CQ doorbell typeJoseph Wong2025-08-131-2/+2
* [dwgpio] Use fdt_reg() to get GPIO port numbersMichael Brown2025-08-072-15/+9Star
* [fdt] Provide fdt_reg() for unsized single-entry regionsMichael Brown2025-08-071-7/+3Star
* [dwgpio] Add driver for the DesignWare GPIO controllerMichael Brown2025-08-053-5/+420
* [fdt] Use phandle as device locationMichael Brown2025-08-041-0/+1
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2026-03-04 14:26:40 +0100