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Intel - White Paper - A Tour beyond BIOS Memory Map Design in UEFI BIOS - Feb 2015
*
*
* INTRODUCTION TO MEMORY MAP
*
*
Typical memory map includes the storage accessed by processor directly
1) Physical memory (Main Memory, SMRAM (SMM stolen memory), integrated graphic stolen memory)
2) Memory Mapped IO (PCI-Express Memory Mapped Configuration Space, PCI device MMO BAR, CPU Local APIC,
legacy video buffer, memory mapped flash device, TPM memory map configuration space.
Memory Map does not include:
1) Cache, eg CPU internal cache
2) Disk, eg ATA hard driver, SCSI hard drive, CDROM/DVDROM, USB storage device
*
*
* MEMORY MAP - HARDWARE PERSPECTIVE
*
*
typical Intel x86 platform as example
System Memory = main dynamic random access memory (DRAM)
-------------
Classification:
1) Legacy region lesser than 1MiB
2) Main memory between 1MiB and 4GiB
3) Main memory greater than 4GiB
-----Legacy Region is for legacy OS or device consideration. 0 - 1 MiB. Areas:
(0x9FFFF = 0009_FFFFh)
* 0 - 640KiB (0 - 0x9FFFF): DOS Area. The normal DRAM is for legacy OS (DOS) or boot loader usage
* 640 - 768KiB (0xA0000 - 0xBFFFF): SMRAM/Legacy Video Buffer Area. This region can be configured as SMM memory,
or mapped IO for legacy video buffer.
* 768 - 896KiB (0xC0000 - 0xDFFFF): Expansion Area for legacy option ROM. This region is DRAM and could be locked read-only.
* 869KiB - 1MiB (0xE0000 - 0xFFFFF): System BIOS Area. This region could be DRAM or could be configured as memory IO to flash region.
+ 0xE0000 - 0xEFFFF: Extended System BIOS (Lower)
+ 0xF0000 - 0xFFFFF: System BIOS (Upper)
-----Traditional OS. 1MiB - 4GiB
Occupied by memory-mapped IO, like flash, CPU APIC, TPM
dedicated register TOLUD: Top of Low Usable DRAM to indicate the bar. Areas:
* Normal DRAM: Used by OS
* ISA Hole (15MiB - 16MiB): Optional feature. If enabled, the normal DRAM is disabled by opening the hole.
* Protected Memory Range (DPR): Optional feature. If enabled, this DRAM cannot be accessed by DMA.
* Top memory for SMM: TSEG (Top Segment) SMRAM. If enabled, this DRAM can be accessed if and only if CPU in SMM mode.
* Top memory for integrated graphic device (IGD): IGD stolen memory. If enabled, this DRAM is served for IGD.
* Top memory for Intel Manageability Engine (ME): ME stolen memory. If enabled, this DRAM is served for ME. If total memory
greater than 4GiB, the ME stolen memory will be greater than 4BiG. So this region is always on top of physical memory and
it is not covered by TOLUD.
*
*
* MEMORY MAP - FIRMWARE PERSPECTIVE
*
*
Memory Map in PI Specification (PEI Phase): memory map is the PEI Hand-of-Block (HOB) (PI specification, vol 3,5.5 Resource Descriptor HOB)
Resource types:
* EFI_RESOURCE_SYSTEM_MEMORY: Memory that persists out of the HOB producer phase
* EFI_RESOURCE_MEMORY_MAPPED_IO: Memory-mapped I/O that is programmed in the HOB producer phase
* EFI_RESOURCE_FIRMWARE_DEVICE: Memory-mapped firmware devices
* EFI_RESOURCE_MEMORY_MAPPED_IO_PORT: Memory that is decoded to produce I/O cycles
Memory Map in PI Specification (DXE Phase): ...
#
#
# Memory Map in UEFI specification
#
#
functions: AllocatePages(), AllocatePool(), FreePages(), FreePool()
When memory is allocated, it is "typed" according to the values EFI_MEMORY_TYPE (UEFI specification Table 25. Memory Type Usage before ExitBootServices())
example types:
* EfiReservedMemoryType: not used by OS. According to ACPI specification, one of possible reasons a BIOS need this memory type is:
the address range contains RAM in use by the ROM
* EfiLoaderCode/EfiLoaderData: Used for UEFI application
* EfiBootServicesCode/EfiBootServicesData: Used for UEFI boot services driver.
* EfiRuntimeServicesCode/EfiRuntimeServicesData: Used for UEFI runtime services driver
* EfiACPIReclaimMemory: Used for most ACPI tables. The memory is to be preserved by the loader and OS until ACPI is enabled.
Once ACPI is enabled, the memory in this range is available for general use.
* EfiACPIMemoryNVS: Address space reserved for use by the firmware (eg ACPI FACS). The OS and loader must preserve this memory
range in the working ACPI S1-S3 states
* EfiMemoryMappedIO: Used by system firmware to request that a memory-mapped IO region be mapped by the OS to a virtual
address so it can be accessed ny EFI runtime services. The OS does not use this memorx. All system memory-mapped I/O
port space information should come from ACPI tables.
GetMemoryMap() interface returns an array of UEFI memory descriptors. These descriptors define a system memory map of all the installed RAM and of physical memory ranges reserved by the firmware. Each descriptor contains memory base and site at page level, as well as memory type and attributes. Memory attributes defined in UEFI specification - Memory Attribute Definitions.
* Memory cache ability attribute: EFI_MEMORY_UC, EFI_MEMORY_WC, EFI_MEMORY_WT, EFI_MEMORY_WB, EFI_MEMORY_UCE.
It means the memory region supports to be configured as cache attributes.
On x86, those attributes can be set to CPU MSR [see IA32SDM]
* Physical memory protection attribute: EFI_MEMORY_WP, EFI_MEMORY_RP, EFI_MEMORY_XP
Means memory region supports to be configured as write-protected, read-protected, or execution-protected by system hardware.
On x86, those attributes can be set to CPU page table. [see IA32SDM]
* Runtime memory attribute: EFI_MEMORY_RUNTIME. It means the memory region needs to be given a virtual mapping by the operating
system when SetVirtualAddressMap() is called.
According to ACPI specification, 15.4 UEFI Assumptions and Limitations, below memory range need to be reported:
* Current system memory configuration
* Chipset-defined address holes that are not being used by devices as reserved.
* Baseboard memory-mapped I/O devices, such as APICs, are returned as reserved.
* All occurrences of the system firmware are mapped as reserved. Including the areas below 1 MB, at 16 MB
(if present), and at end of the 4-GB address space.
* All of lower memory is reported as normal memory. The OS must handle standard RAM locations that are
reserved for specific uses, such as the interrupt vector table (0:0) and the BIOS data area (40:0).
* Memory mapped I/O and memory mapped I/O port space allowed for virtual mode calls to UEFI run-time functions.
Below memory range does not need to be reported:
* Memory mapping of PCI devices, ISA Option ROMs, and ISA Plug and Play cards.
Because the OS has mechanisms available to detect them. For example, PCI BAR MMIO can be got by
standard PCI bus enumeration. On-board device (e.g. TPM) MMIO could be got by ACPI _CRS method.
* Standard PC address ranges are not reported. For example, video memory at 0xA0000 to 0xBFFFF physical
addresses are not described by this function.
#
#
# Memory Map in ACPI specification
#
#
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