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APIC - Advanced Programmable Interrupt Controller (Wikipedia)
Particularly enabling the construction of multiprocessor systems.
One of several architectural designs intended to solve interrupt routing efficiency issues in multiprocessor computer systems.
Split architecture design: local component (LAPIC) and optional I/O APIC on a system bus.
Intel: One LAPIC in each CPU and typically one I/O APIC for each peripheral bus in the system.
Each APIC, whether a discrete chip or integrated in a CPU, has a version register containing a four-bit version number for its specific APIC implementation. For example, the 82489DX has an APIC version number of 0, while version 1 was assigned to the first generation of local APICs integrated in the Pentium 90 and 100 processors
INTEGRATED LOCAL APICS
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Manage all external interrupts for some specific processor in an SMP system.
In addition, able to accept and generate inter-processor interrupts (IPIs) between LAPICS.
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