diff options
| author | Martin Blumenstingl | 2017-10-30 00:05:21 +0100 |
|---|---|---|
| committer | Marc Zyngier | 2017-11-02 16:55:45 +0100 |
| commit | 4e4cb1b183d6e9df57f4e54c8b1a5231995da820 (patch) | |
| tree | 9f308ae291894e8f4617f48f7b33317075c94cce /.cocciconfig | |
| parent | irqdomain: Update the comments of fwnode field of irq_domain structure (diff) | |
| download | kernel-qcow2-linux-4e4cb1b183d6e9df57f4e54c8b1a5231995da820.tar.gz kernel-qcow2-linux-4e4cb1b183d6e9df57f4e54c8b1a5231995da820.tar.xz kernel-qcow2-linux-4e4cb1b183d6e9df57f4e54c8b1a5231995da820.zip | |
irqchip/meson-gpio: add support for Meson8 SoCs
Meson8 uses the same GPIO interrupt controller IP block as the other
Meson SoCs. A total of 134 pins can be spied on, which is the sum of:
- 22 pins on bank GPIOX
- 17 pins on bank GPIOY
- 30 pins on bank GPIODV
- 10 pins on bank GPIOH
- 15 pins on bank GPIOZ
- 7 pins on bank CARD
- 19 pins on bank BOOT
- 14 pins in the AO domain
Acked-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to '.cocciconfig')
0 files changed, 0 insertions, 0 deletions