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| author | Paul Mundt | 2007-11-08 11:08:28 +0100 |
|---|---|---|
| committer | Paul Mundt | 2008-01-28 05:18:40 +0100 |
| commit | 0fa70efbd45a6c4fd946fa71c0a609f2c509d07c (patch) | |
| tree | ef4992b4c0f0e8e03b2d6bbe2346fff087668b99 | |
| parent | sh: Add cache definitions for SH-5. (diff) | |
| download | kernel-qcow2-linux-0fa70efbd45a6c4fd946fa71c0a609f2c509d07c.tar.gz kernel-qcow2-linux-0fa70efbd45a6c4fd946fa71c0a609f2c509d07c.tar.xz kernel-qcow2-linux-0fa70efbd45a6c4fd946fa71c0a609f2c509d07c.zip | |
sh: Correct SH-5 instruction size value.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| -rw-r--r-- | include/asm-sh/system.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index 4faa2fb88616..288abeb5476f 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h @@ -255,8 +255,10 @@ static inline void *set_exception_table_evt(unsigned int evt, void *handler) */ #ifdef CONFIG_CPU_SH2A extern unsigned int instruction_size(unsigned int insn); -#else +#elif defined(CONFIG_SUPERH32) #define instruction_size(insn) (2) +#else +#define instruction_size(insn) (4) #endif /* XXX |