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| author | Franklin S Cooper Jr | 2017-03-07 22:57:51 +0100 |
|---|---|---|
| committer | Tony Lindgren | 2017-03-23 21:55:35 +0100 |
| commit | 14eb6855b2532b8e05d7df3381f4d769fb9d676f (patch) | |
| tree | 928e035eedade143637646a9f87dc15cb72ee930 | |
| parent | Documentation: devicetree: mtd: add w25q64 to list of supported SPI flashes (diff) | |
| download | kernel-qcow2-linux-14eb6855b2532b8e05d7df3381f4d769fb9d676f.tar.gz kernel-qcow2-linux-14eb6855b2532b8e05d7df3381f4d769fb9d676f.tar.xz kernel-qcow2-linux-14eb6855b2532b8e05d7df3381f4d769fb9d676f.zip | |
ARM: dts: am335x-icev2: Add SPI based NOR
Enable support for W25Q64CVSSIG which is a Winbond 64 Mbit SPI NOR.
At boot you will see the following message:
m25p80 spi1.0: found s25fl064k, expected w25q64
This is because the JEDEC ID for this chip is the same as s25fl064k.
However, this should be harmless since both chips are essentially the
same.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
| -rw-r--r-- | arch/arm/boot/dts/am335x-icev2.dts | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am335x-icev2.dts b/arch/arm/boot/dts/am335x-icev2.dts index a2ad076822db..1e643dcf63ec 100644 --- a/arch/arm/boot/dts/am335x-icev2.dts +++ b/arch/arm/boot/dts/am335x-icev2.dts @@ -245,6 +245,39 @@ spi-max-frequency = <1000000>; spi-cpol; }; + + spi_nor: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "winbond,w25q64", "jedec,spi-nor"; + spi-max-frequency = <80000000>; + m25p,fast-read; + reg = <0>; + + partition@0 { + label = "u-boot-spl"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@1 { + label = "u-boot"; + reg = <0x80000 0x100000>; + read-only; + }; + + partition@2 { + label = "u-boot-env"; + reg = <0x180000 0x20000>; + read-only; + }; + + partition@3 { + label = "misc"; + reg = <0x1A0000 0x660000>; + }; + }; + }; &tscadc { |