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authorRajesh Bhagat2016-06-10 08:23:45 +0200
committerShawn Guo2016-06-11 16:10:59 +0200
commit1cd78dd6bd252547012b16cdc56e7fb55b1800f9 (patch)
tree9a7534e87f36291029162ee5a995f6d9b5a8cf45
parentarm64: dts: fsl: Update address-cells and reg properties of cpu nodes (diff)
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arm64: dts: ls2080a: Add dis_rxdet_inp3_quirk property to USB3 node
Add "dis_rxdet_inp3_quirk" boolean property to USB3 node. This property is used to disable rx detection in P3 PHY mode. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
index 25ff4a8f0b7a..e8a48f229fb6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -672,6 +672,7 @@
interrupts = <0 80 0x4>; /* Level high type */
dr_mode = "host";
snps,quirk-frame-length-adjustment = <0x20>;
+ snps,dis_rxdet_inp3_quirk;
};
usb1: usb3@3110000 {
@@ -681,6 +682,7 @@
interrupts = <0 81 0x4>; /* Level high type */
dr_mode = "host";
snps,quirk-frame-length-adjustment = <0x20>;
+ snps,dis_rxdet_inp3_quirk;
};
ccn@4000000 {