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| author | Tomi Valkeinen | 2013-10-09 15:12:38 +0200 |
|---|---|---|
| committer | Paul Walmsley | 2013-10-24 17:07:13 +0200 |
| commit | 262c2c9d06585fb0ffc84da18e0f747836ce8baf (patch) | |
| tree | a1c2cb4979fef809854f3ce7b39a604dbe3c34cc | |
| parent | ARM: OMAP4: use CLK_SET_RATE_PARENT for dss_dss_clk (diff) | |
| download | kernel-qcow2-linux-262c2c9d06585fb0ffc84da18e0f747836ce8baf.tar.gz kernel-qcow2-linux-262c2c9d06585fb0ffc84da18e0f747836ce8baf.tar.xz kernel-qcow2-linux-262c2c9d06585fb0ffc84da18e0f747836ce8baf.zip | |
ARM: OMAP3: use CLK_SET_RATE_PARENT for dss clocks
Set CLK_SET_RATE_PARENT flag for dss1_alwon_fck_3430es2,
dss1_alwon_fck_3430es1 and dpll4_m4x2_ck so that the DSS's fclk can be
configured without the need to get the parent's parent of the fclk.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
| -rw-r--r-- | arch/arm/mach-omap2/cclock3xxx_data.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c index 334b76745900..a51dd75a8eaa 100644 --- a/arch/arm/mach-omap2/cclock3xxx_data.c +++ b/arch/arm/mach-omap2/cclock3xxx_data.c @@ -869,7 +869,8 @@ static struct clk_hw_omap dpll4_m4x2_ck_hw = { .clkdm_name = "dpll4_clkdm", }; -DEFINE_STRUCT_CLK(dpll4_m4x2_ck, dpll4_m4x2_ck_parent_names, dpll4_m5x2_ck_ops); +DEFINE_STRUCT_CLK_FLAGS(dpll4_m4x2_ck, dpll4_m4x2_ck_parent_names, + dpll4_m5x2_ck_ops, CLK_SET_RATE_PARENT); static struct clk dpll4_m4x2_ck_3630 = { .name = "dpll4_m4x2_ck", @@ -877,6 +878,7 @@ static struct clk dpll4_m4x2_ck_3630 = { .parent_names = dpll4_m4x2_ck_parent_names, .num_parents = ARRAY_SIZE(dpll4_m4x2_ck_parent_names), .ops = &dpll4_m5x2_ck_3630_ops, + .flags = CLK_SET_RATE_PARENT, }; DEFINE_CLK_DIVIDER(dpll4_m6_ck, "dpll4_ck", &dpll4_ck, 0x0, @@ -968,8 +970,9 @@ static struct clk_hw_omap dss1_alwon_fck_3430es1_hw = { .clkdm_name = "dss_clkdm", }; -DEFINE_STRUCT_CLK(dss1_alwon_fck_3430es1, dss1_alwon_fck_3430es1_parent_names, - aes2_ick_ops); +DEFINE_STRUCT_CLK_FLAGS(dss1_alwon_fck_3430es1, + dss1_alwon_fck_3430es1_parent_names, aes2_ick_ops, + CLK_SET_RATE_PARENT); static struct clk dss1_alwon_fck_3430es2; @@ -983,8 +986,9 @@ static struct clk_hw_omap dss1_alwon_fck_3430es2_hw = { .clkdm_name = "dss_clkdm", }; -DEFINE_STRUCT_CLK(dss1_alwon_fck_3430es2, dss1_alwon_fck_3430es1_parent_names, - aes2_ick_ops); +DEFINE_STRUCT_CLK_FLAGS(dss1_alwon_fck_3430es2, + dss1_alwon_fck_3430es1_parent_names, aes2_ick_ops, + CLK_SET_RATE_PARENT); static struct clk dss2_alwon_fck; |