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authorWill Deacon2016-09-22 12:48:19 +0200
committerWill Deacon2017-10-18 13:53:33 +0200
commit4b8b77a4ec807a5f14e02e84b1bb7a2fd43768c0 (patch)
treed73cb5b0113e48b4de3651e39609e98175029346
parentarm64: head: Init PMSCR_EL2.{PA,PCT} when entered at EL2 without VHE (diff)
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dt-bindings: Document devicetree binding for ARM SPE
This patch documents the devicetree binding in use for ARM SPE. Cc: Rob Herring <robh@kernel.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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+* ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU)
+
+ARMv8.2 introduces the optional Statistical Profiling Extension for collecting
+performance sample data using an in-memory trace buffer.
+
+** SPE Required properties:
+
+- compatible : should be one of:
+ "arm,statistical-profiling-extension-v1"
+
+- interrupts : Exactly 1 PPI must be listed. For heterogeneous systems where
+ SPE is only supported on a subset of the CPUs, please consult
+ the arm,gic-v3 binding for details on describing a PPI partition.
+
+** Example:
+
+spe-pmu {
+ compatible = "arm,statistical-profiling-extension-v1";
+ interrupts = <GIC_PPI 05 IRQ_TYPE_LEVEL_HIGH &part1>;
+};