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author | David S. Miller | 2019-05-06 06:58:36 +0200 |
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committer | David S. Miller | 2019-05-06 06:58:36 +0200 |
commit | 54516da1ea859dd4f56ebba2e483d2df9d7c8a32 (patch) | |
tree | 9752f3833fd9236102aee441ab7bcc4d8f11c469 | |
parent | Merge branch 'mlxsw-spectrum-Implement-loopback-ethtool-feature' (diff) | |
parent | r8169: add rtl8168g_set_pause_thresholds (diff) | |
download | kernel-qcow2-linux-54516da1ea859dd4f56ebba2e483d2df9d7c8a32.tar.gz kernel-qcow2-linux-54516da1ea859dd4f56ebba2e483d2df9d7c8a32.tar.xz kernel-qcow2-linux-54516da1ea859dd4f56ebba2e483d2df9d7c8a32.zip |
Merge branch 'r8169-replace-some-magic-with-more-speaking-functions'
Heiner Kallweit says:
====================
r8169: replace some magic with more speaking functions
Based on info from Realtek replace some magic with speaking functions
even though the exact meaning of certain values isn't known.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/ethernet/realtek/r8169.c | 45 |
1 files changed, 27 insertions, 18 deletions
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c index f441ecbed7a1..549be1c76a89 100644 --- a/drivers/net/ethernet/realtek/r8169.c +++ b/drivers/net/ethernet/realtek/r8169.c @@ -4756,6 +4756,24 @@ static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable) udelay(10); } +static void rtl_set_fifo_size(struct rtl8169_private *tp, u16 rx_stat, + u16 tx_stat, u16 rx_dyn, u16 tx_dyn) +{ + /* Usage of dynamic vs. static FIFO is controlled by bit + * TXCFG_AUTO_FIFO. Exact meaning of FIFO values isn't known. + */ + rtl_eri_write(tp, 0xc8, ERIAR_MASK_1111, (rx_stat << 16) | rx_dyn); + rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, (tx_stat << 16) | tx_dyn); +} + +static void rtl8168g_set_pause_thresholds(struct rtl8169_private *tp, + u8 low, u8 high) +{ + /* FIFO thresholds for pause flow control */ + rtl_eri_write(tp, 0xcc, ERIAR_MASK_0001, low); + rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, high); +} + static void rtl_hw_start_8168bb(struct rtl8169_private *tp) { RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en); @@ -4982,8 +5000,7 @@ static void rtl_hw_start_8168e_2(struct rtl8169_private *tp) rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000); rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000); - rtl_eri_write(tp, 0xc8, ERIAR_MASK_1111, 0x00100002); - rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006); + rtl_set_fifo_size(tp, 0x10, 0x10, 0x02, 0x06); rtl_eri_write(tp, 0xcc, ERIAR_MASK_1111, 0x00000050); rtl_eri_write(tp, 0xd0, ERIAR_MASK_1111, 0x07ff0060); rtl_eri_set_bits(tp, 0x1b0, ERIAR_MASK_0001, BIT(4)); @@ -5012,8 +5029,7 @@ static void rtl_hw_start_8168f(struct rtl8169_private *tp) rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000); rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000); - rtl_eri_write(tp, 0xc8, ERIAR_MASK_1111, 0x00100002); - rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006); + rtl_set_fifo_size(tp, 0x10, 0x10, 0x02, 0x06); rtl_reset_packet_filter(tp); rtl_eri_set_bits(tp, 0x1b0, ERIAR_MASK_0001, BIT(4)); rtl_eri_set_bits(tp, 0x1d0, ERIAR_MASK_0001, BIT(4)); @@ -5067,10 +5083,8 @@ static void rtl_hw_start_8411(struct rtl8169_private *tp) static void rtl_hw_start_8168g(struct rtl8169_private *tp) { - rtl_eri_write(tp, 0xc8, ERIAR_MASK_0101, 0x080002); - rtl_eri_write(tp, 0xcc, ERIAR_MASK_0001, 0x38); - rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, 0x48); - rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006); + rtl_set_fifo_size(tp, 0x08, 0x10, 0x02, 0x06); + rtl8168g_set_pause_thresholds(tp, 0x38, 0x48); rtl_set_def_aspm_entry_latency(tp); @@ -5162,10 +5176,8 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp) rtl_hw_aspm_clkreq_enable(tp, false); rtl_ephy_init(tp, e_info_8168h_1); - rtl_eri_write(tp, 0xc8, ERIAR_MASK_0101, 0x00080002); - rtl_eri_write(tp, 0xcc, ERIAR_MASK_0001, 0x38); - rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, 0x48); - rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006); + rtl_set_fifo_size(tp, 0x08, 0x10, 0x02, 0x06); + rtl8168g_set_pause_thresholds(tp, 0x38, 0x48); rtl_set_def_aspm_entry_latency(tp); @@ -5242,10 +5254,8 @@ static void rtl_hw_start_8168ep(struct rtl8169_private *tp) { rtl8168ep_stop_cmac(tp); - rtl_eri_write(tp, 0xc8, ERIAR_MASK_0101, 0x00080002); - rtl_eri_write(tp, 0xcc, ERIAR_MASK_0001, 0x2f); - rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, 0x5f); - rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006); + rtl_set_fifo_size(tp, 0x08, 0x10, 0x02, 0x06); + rtl8168g_set_pause_thresholds(tp, 0x2f, 0x5f); rtl_set_def_aspm_entry_latency(tp); @@ -5445,8 +5455,7 @@ static void rtl_hw_start_8402(struct rtl8169_private *tp) rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); - rtl_eri_write(tp, 0xc8, ERIAR_MASK_1111, 0x00000002); - rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00000006); + rtl_set_fifo_size(tp, 0x00, 0x00, 0x02, 0x06); rtl_reset_packet_filter(tp); rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000); rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000); |