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| author | Damien Lespiau | 2015-02-09 20:33:19 +0100 |
|---|---|---|
| committer | Daniel Vetter | 2015-02-13 23:28:35 +0100 |
| commit | 81e231afe7478f1bf14bbb17c26d6ebf054faece (patch) | |
| tree | 34392d33f2e4668bc442c8d8c83bf82f269e94b8 | |
| parent | drm/i915/skl: Implement WaDisableLSQCROPERFforOCL (diff) | |
| download | kernel-qcow2-linux-81e231afe7478f1bf14bbb17c26d6ebf054faece.tar.gz kernel-qcow2-linux-81e231afe7478f1bf14bbb17c26d6ebf054faece.tar.xz kernel-qcow2-linux-81e231afe7478f1bf14bbb17c26d6ebf054faece.zip | |
drm/i915/skl: Implement WaDisableHDCInvalidation
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 6 |
2 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 0fb6a4f6c6f7..75227009d0bb 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -140,6 +140,7 @@ #define GEN8_RING_PDP_LDW(ring, n) ((ring)->mmio_base+0x270 + (n) * 8) #define GAM_ECOCHK 0x4090 +#define BDW_DISABLE_HDC_INVALIDATION (1<<25) #define ECOCHK_SNB_BIT (1<<10) #define HSW_ECOCHK_ARB_PRIO_SOL (1<<6) #define ECOCHK_PPGTT_CACHE64B (0x3<<3) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index d7750176091b..a2b9c3e213f9 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -66,6 +66,12 @@ static void skl_init_clock_gating(struct drm_device *dev) GEN8_SDEUNIT_CLOCK_GATE_DISABLE); } + if (INTEL_REVID(dev) <= SKL_REVID_D0) + /* WaDisableHDCInvalidation:skl */ + I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | + BDW_DISABLE_HDC_INVALIDATION); + + if (INTEL_REVID(dev) <= SKL_REVID_E0) /* WaDisableLSQCROPERFforOCL:skl */ I915_WRITE(GEN8_L3SQCREG4, I915_READ(GEN8_L3SQCREG4) | |