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| author | Yan Zhao | 2019-03-27 05:55:45 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman | 2019-04-17 08:38:39 +0200 |
| commit | 8ad895bf4b8bb365d074af01ab9deead7130246d (patch) | |
| tree | c902d213375038658177c33cd3cc1616a8c2dc5b | |
| parent | kvm: nVMX: NMI-window and interrupt-window exiting should wake L2 from HLT (diff) | |
| download | kernel-qcow2-linux-8ad895bf4b8bb365d074af01ab9deead7130246d.tar.gz kernel-qcow2-linux-8ad895bf4b8bb365d074af01ab9deead7130246d.tar.xz kernel-qcow2-linux-8ad895bf4b8bb365d074af01ab9deead7130246d.zip | |
drm/i915/gvt: do not let pin count of shadow mm go negative
[ Upstream commit 663a50ceac75c2208d2ad95365bc8382fd42f44d ]
shadow mm's pin count got increased in workload preparation phase, which
is after workload scanning.
it will get decreased in complete_current_workload() anyway after
workload completion.
Sometimes, if a workload meets a scanning error, its shadow mm pin count
will not get increased but will get decreased in the end.
This patch lets shadow mm's pin count not go below 0.
Fixes: 2707e4446688 ("drm/i915/gvt: vGPU graphics memory virtualization")
Cc: zhenyuw@linux.intel.com
Cc: stable@vger.kernel.org #4.14+
Signed-off-by: Yan Zhao <yan.y.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
| -rw-r--r-- | drivers/gpu/drm/i915/gvt/gtt.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c index 00aad8164dec..542f31ce108f 100644 --- a/drivers/gpu/drm/i915/gvt/gtt.c +++ b/drivers/gpu/drm/i915/gvt/gtt.c @@ -1940,7 +1940,7 @@ void _intel_vgpu_mm_release(struct kref *mm_ref) */ void intel_vgpu_unpin_mm(struct intel_vgpu_mm *mm) { - atomic_dec(&mm->pincount); + atomic_dec_if_positive(&mm->pincount); } /** |