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| author | Purna Chandra Mandal | 2016-05-17 07:05:51 +0200 |
|---|---|---|
| committer | Stephen Boyd | 2016-08-25 01:05:24 +0200 |
| commit | a38c94106e0dc77490ff820450c0c4af3b57fbc7 (patch) | |
| tree | 2e07c0a2d0d362d77fd207ff1ae828f474c09622 | |
| parent | clk: microchip: use readl_poll_timeout() in pbclk_set_rate(). (diff) | |
| download | kernel-qcow2-linux-a38c94106e0dc77490ff820450c0c4af3b57fbc7.tar.gz kernel-qcow2-linux-a38c94106e0dc77490ff820450c0c4af3b57fbc7.tar.xz kernel-qcow2-linux-a38c94106e0dc77490ff820450c0c4af3b57fbc7.zip | |
clk: microchip: Initialize SOSC clock rate for PIC32MZDA.
Optional SOSC is an external fixed clock running at 32768HZ.
So Initialize SOSC rate as per PIC32MZDA datasheet.
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| -rw-r--r-- | drivers/clk/microchip/clk-pic32mzda.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/microchip/clk-pic32mzda.c b/drivers/clk/microchip/clk-pic32mzda.c index 51f54380474b..9f734779be92 100644 --- a/drivers/clk/microchip/clk-pic32mzda.c +++ b/drivers/clk/microchip/clk-pic32mzda.c @@ -118,6 +118,7 @@ static const struct pic32_sec_osc_data sosc_clk = { .status_reg = 0x1d0, .enable_mask = BIT(1), .status_mask = BIT(4), + .fixed_rate = 32768, .init_data = { .name = "sosc_clk", .parent_names = NULL, |