diff options
| author | Hassan Naveed | 2018-10-30 02:27:41 +0100 |
|---|---|---|
| committer | Paul Burton | 2018-11-05 19:15:28 +0100 |
| commit | b3a428b4b18d495a06f39515568850f8db4c98ea (patch) | |
| tree | 77c882b8cbe9c262855ebe5794a8c096ead8c96f | |
| parent | MIPS: math-emu: Change to use DEFINE_SHOW_ATTRIBUTE macro (diff) | |
| download | kernel-qcow2-linux-b3a428b4b18d495a06f39515568850f8db4c98ea.tar.gz kernel-qcow2-linux-b3a428b4b18d495a06f39515568850f8db4c98ea.tar.xz kernel-qcow2-linux-b3a428b4b18d495a06f39515568850f8db4c98ea.zip | |
MIPS: Enable IOREMAP_PROT config option for MIPS cpus
Allows the users of ptrace to access memory mapped by the ptraced process
using the same cache coherency attributes as the original process.
For example while using gdb with ioremap_prot() incorporated, both gdb and
the process being traced will have same cache coherency attributes.
Signed-off-by: Hassan Naveed <hnaveed@wavecomp.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/20955/
Cc: <linux-mips@linux-mips.org>
| -rw-r--r-- | Documentation/features/vm/ioremap_prot/arch-support.txt | 2 | ||||
| -rw-r--r-- | arch/mips/Kconfig | 1 | ||||
| -rw-r--r-- | arch/mips/include/asm/io.h | 12 | ||||
| -rw-r--r-- | arch/mips/include/asm/page.h | 1 |
4 files changed, 15 insertions, 1 deletions
diff --git a/Documentation/features/vm/ioremap_prot/arch-support.txt b/Documentation/features/vm/ioremap_prot/arch-support.txt index 8527601a3739..326e4797bc65 100644 --- a/Documentation/features/vm/ioremap_prot/arch-support.txt +++ b/Documentation/features/vm/ioremap_prot/arch-support.txt @@ -16,7 +16,7 @@ | ia64: | TODO | | m68k: | TODO | | microblaze: | TODO | - | mips: | TODO | + | mips: | ok | | nds32: | TODO | | nios2: | TODO | | openrisc: | TODO | diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 8272ea4c7264..378525aaadcc 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -56,6 +56,7 @@ config MIPS select HAVE_FUNCTION_TRACER select HAVE_GENERIC_DMA_COHERENT select HAVE_IDE + select HAVE_IOREMAP_PROT select HAVE_IRQ_EXIT_ON_IRQ_STACK select HAVE_IRQ_TIME_ACCOUNTING select HAVE_KPROBES diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 266257d56fb6..b5322f7386bf 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -218,6 +218,18 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si } /* + * ioremap_prot - map bus memory into CPU space + * @offset: bus address of the memory + * @size: size of the resource to map + + * ioremap_prot gives the caller control over cache coherency attributes (CCA) + */ +static inline void __iomem *ioremap_prot(phys_addr_t offset, + unsigned long size, unsigned long prot_val) { + return __ioremap_mode(offset, size, prot_val & _CACHE_MASK); +} + +/* * ioremap - map bus memory into CPU space * @offset: bus address of the memory * @size: size of the resource to map diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h index e8cc328fce2d..6b31c93b5eaa 100644 --- a/arch/mips/include/asm/page.h +++ b/arch/mips/include/asm/page.h @@ -154,6 +154,7 @@ typedef struct { unsigned long pgd; } pgd_t; typedef struct { unsigned long pgprot; } pgprot_t; #define pgprot_val(x) ((x).pgprot) #define __pgprot(x) ((pgprot_t) { (x) } ) +#define pte_pgprot(x) __pgprot(pte_val(x) & ~_PFN_MASK) /* * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd |