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| author | Emil Medve | 2007-09-26 19:03:40 +0200 |
|---|---|---|
| committer | Kumar Gala | 2007-10-04 18:03:03 +0200 |
| commit | b6927bca245f83879bcb319aa108a1a347e36d8f (patch) | |
| tree | 784a2fc37a6343f1bdc58aeb569aed360f4cda85 | |
| parent | [POWERPC] fsl_soc: rtc-ds1307 support (diff) | |
| download | kernel-qcow2-linux-b6927bca245f83879bcb319aa108a1a347e36d8f.tar.gz kernel-qcow2-linux-b6927bca245f83879bcb319aa108a1a347e36d8f.tar.xz kernel-qcow2-linux-b6927bca245f83879bcb319aa108a1a347e36d8f.zip | |
[POWERPC] QE: Added missing CEURNR register
According to the publicly available MPC8360E RM (rev. 1 from 09/2006 and rev. 2
from 05/2007) and MPC8323E RM (rev. 1 from 09/2006), CEURNR is the QE microcode
revision number register and is located at offset 0x1b8 within the QE internal
register space
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| -rw-r--r-- | include/asm-powerpc/immap_qe.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/include/asm-powerpc/immap_qe.h b/include/asm-powerpc/immap_qe.h index 1020b7fc0129..02548f74ccb7 100644 --- a/include/asm-powerpc/immap_qe.h +++ b/include/asm-powerpc/immap_qe.h @@ -86,8 +86,9 @@ struct cp_qe { __be16 ceexe4; /* QE external request 4 event register */ u8 res11[0x2]; __be16 ceexm4; /* QE external request 4 mask register */ - u8 res12[0x2]; - u8 res13[0x280]; + u8 res12[0x3A]; + __be32 ceurnr; /* QE microcode revision number register */ + u8 res13[0x244]; } __attribute__ ((packed)); /* QE Multiplexer */ |