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| author | David Daney | 2016-02-01 23:43:41 +0100 |
|---|---|---|
| committer | Ralf Baechle | 2016-05-13 14:01:38 +0200 |
| commit | b8c8f665076604762fd15eb815f2fd75eb511b2e (patch) | |
| tree | 470c5af83c04769784454e0abfa6181046564ae6 | |
| parent | MIPS: highmem: Turn flush_cache_kmaps into a no-op. (diff) | |
| download | kernel-qcow2-linux-b8c8f665076604762fd15eb815f2fd75eb511b2e.tar.gz kernel-qcow2-linux-b8c8f665076604762fd15eb815f2fd75eb511b2e.tar.xz kernel-qcow2-linux-b8c8f665076604762fd15eb815f2fd75eb511b2e.zip | |
MIPS: Add CPU identifiers and probing for Cavium CN73xx and CNF75xx processors.
Add new processor identifiers for Cavium CN73xx and CNF75xx
processors, and probe for them in cpu-probe.c
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12311/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/include/asm/cpu.h | 2 | ||||
| -rw-r--r-- | arch/mips/kernel/cpu-probe.c | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index a97ca97285ec..7bea0f3bf9ee 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -169,6 +169,8 @@ #define PRID_IMP_CAVIUM_CNF71XX 0x9400 #define PRID_IMP_CAVIUM_CN78XX 0x9500 #define PRID_IMP_CAVIUM_CN70XX 0x9600 +#define PRID_IMP_CAVIUM_CN73XX 0x9700 +#define PRID_IMP_CAVIUM_CNF75XX 0x9800 /* * These are the PRID's for when 23:16 == PRID_COMP_INGENIC_* diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index b725b713b9f8..9ad6157e23de 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1481,6 +1481,8 @@ platform: set_elf_platform(cpu, "octeon2"); break; case PRID_IMP_CAVIUM_CN70XX: + case PRID_IMP_CAVIUM_CN73XX: + case PRID_IMP_CAVIUM_CNF75XX: case PRID_IMP_CAVIUM_CN78XX: c->cputype = CPU_CAVIUM_OCTEON3; __cpu_name[cpu] = "Cavium Octeon III"; |