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| author | Chen-Yu Tsai | 2017-05-31 09:58:21 +0200 |
|---|---|---|
| committer | Maxime Ripard | 2017-05-31 21:57:27 +0200 |
| commit | c4be8c68e6900b1811bc64f74cb13d5032a389ce (patch) | |
| tree | 1cffd42e211b79ba430da8b611387e266da6c387 | |
| parent | dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks (diff) | |
| download | kernel-qcow2-linux-c4be8c68e6900b1811bc64f74cb13d5032a389ce.tar.gz kernel-qcow2-linux-c4be8c68e6900b1811bc64f74cb13d5032a389ce.tar.xz kernel-qcow2-linux-c4be8c68e6900b1811bc64f74cb13d5032a389ce.zip | |
clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM
The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock.
As such we need to be able to describe this relationship in the device
tree.
Export the PLL_PERIPH0 clock so we can reference it in the PRCM node.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun8i-h3.h | 4 | ||||
| -rw-r--r-- | include/dt-bindings/clock/sun8i-h3-ccu.h | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.h b/drivers/clk/sunxi-ng/ccu-sun8i-h3.h index 85973d1e8165..1b4baea37d81 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.h +++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.h @@ -29,7 +29,9 @@ #define CLK_PLL_VIDEO 6 #define CLK_PLL_VE 7 #define CLK_PLL_DDR 8 -#define CLK_PLL_PERIPH0 9 + +/* PLL_PERIPH0 exported for PRCM */ + #define CLK_PLL_PERIPH0_2X 10 #define CLK_PLL_GPU 11 #define CLK_PLL_PERIPH1 12 diff --git a/include/dt-bindings/clock/sun8i-h3-ccu.h b/include/dt-bindings/clock/sun8i-h3-ccu.h index c2afc41d6964..e139fe5c62ec 100644 --- a/include/dt-bindings/clock/sun8i-h3-ccu.h +++ b/include/dt-bindings/clock/sun8i-h3-ccu.h @@ -43,6 +43,8 @@ #ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_ #define _DT_BINDINGS_CLK_SUN8I_H3_H_ +#define CLK_PLL_PERIPH0 9 + #define CLK_CPUX 14 #define CLK_BUS_CE 20 |