diff options
| author | Paul Mackerras | 2014-01-08 11:25:22 +0100 |
|---|---|---|
| committer | Alexander Graf | 2014-01-27 16:01:02 +0100 |
| commit | ca252055130b6a1affa12df94a4694c1aafc2a6c (patch) | |
| tree | 57c86f8aaf55ba182dc24d3e0d23a18396918e65 | |
| parent | KVM: PPC: Book3S HV: Context-switch new POWER8 SPRs (diff) | |
| download | kernel-qcow2-linux-ca252055130b6a1affa12df94a4694c1aafc2a6c.tar.gz kernel-qcow2-linux-ca252055130b6a1affa12df94a4694c1aafc2a6c.tar.xz kernel-qcow2-linux-ca252055130b6a1affa12df94a4694c1aafc2a6c.zip | |
KVM: PPC: Book3S HV: Flush the correct number of TLB sets on POWER8
POWER8 has 512 sets in the TLB, compared to 128 for POWER7, so we need
to do more tlbiel instructions when flushing the TLB on POWER8.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
| -rw-r--r-- | arch/powerpc/kvm/book3s_hv_rmhandlers.S | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S index 691dd1ef555b..19f8819f90fa 100644 --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S @@ -430,7 +430,13 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201) andc r7,r7,r0 stdcx. r7,0,r6 bne 23b - li r6,128 /* and flush the TLB */ + /* Flush the TLB of any entries for this LPID */ + /* use arch 2.07S as a proxy for POWER8 */ +BEGIN_FTR_SECTION + li r6,512 /* POWER8 has 512 sets */ +FTR_SECTION_ELSE + li r6,128 /* POWER7 has 128 sets */ +ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_207S) mtctr r6 li r7,0x800 /* IS field = 0b10 */ ptesync |