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| author | Alexander Varnin | 2012-11-20 12:02:58 +0100 |
|---|---|---|
| committer | Kukjin Kim | 2012-11-20 12:02:58 +0100 |
| commit | d40dc9ebbbd2e53690c907a0f4d131743bb68da9 (patch) | |
| tree | 9838db4062b5ecc20d8c701524ca5ef2c6b0d807 | |
| parent | ARM: EXYNOS: Remove i2c0 resource information and setting of device names (diff) | |
| download | kernel-qcow2-linux-d40dc9ebbbd2e53690c907a0f4d131743bb68da9.tar.gz kernel-qcow2-linux-d40dc9ebbbd2e53690c907a0f4d131743bb68da9.tar.xz kernel-qcow2-linux-d40dc9ebbbd2e53690c907a0f4d131743bb68da9.zip | |
ARM: S3C24XX: SPI clock channel setup is fixed for S3C2443
Actually, SPI channel 0 on 2443 is mapped to HS SPI controller,
and to enable s3c2410-spi controller, we should power on channel
1 in PCLKCON. There is no channel 0 SPI on s3c2443, so delete its
clock.
Signed-off-by: Alexander Varnin <fenixk19@mail.ru>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| -rw-r--r-- | arch/arm/mach-s3c24xx/clock-s3c2443.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2443.c b/arch/arm/mach-s3c24xx/clock-s3c2443.c index 7f689ce1be61..bdaba59b42dc 100644 --- a/arch/arm/mach-s3c24xx/clock-s3c2443.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2443.c @@ -158,12 +158,6 @@ static struct clk init_clocks_off[] = { .devname = "s3c2410-spi.0", .parent = &clk_p, .enable = s3c2443_clkcon_enable_p, - .ctrlbit = S3C2443_PCLKCON_SPI0, - }, { - .name = "spi", - .devname = "s3c2410-spi.1", - .parent = &clk_p, - .enable = s3c2443_clkcon_enable_p, .ctrlbit = S3C2443_PCLKCON_SPI1, } }; |