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| author | Kumar Gala | 2010-03-11 06:33:25 +0100 |
|---|---|---|
| committer | Kumar Gala | 2010-03-17 05:24:06 +0100 |
| commit | d6ccb1f55ddf5146219707c0e71b85e3a52179b4 (patch) | |
| tree | 467582a2eabfedfcfd37ed2a02e6f00899c6937d | |
| parent | powerpc/booke: Fix breakpoint/watchpoint one-shot behavior (diff) | |
| download | kernel-qcow2-linux-d6ccb1f55ddf5146219707c0e71b85e3a52179b4.tar.gz kernel-qcow2-linux-d6ccb1f55ddf5146219707c0e71b85e3a52179b4.tar.xz kernel-qcow2-linux-d6ccb1f55ddf5146219707c0e71b85e3a52179b4.zip | |
powerpc/85xx: Make sure lwarx hint isn't set on ppc32
e500v1/v2 based chips will treat any reserved field being set in an
opcode as illegal. Thus always setting the hint in the opcode is
a bad idea.
Anton should be kept away from the powerpc opcode map.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| -rw-r--r-- | arch/powerpc/include/asm/ppc-opcode.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h index aea714797590..d553bbeb726c 100644 --- a/arch/powerpc/include/asm/ppc-opcode.h +++ b/arch/powerpc/include/asm/ppc-opcode.h @@ -25,7 +25,7 @@ #define PPC_INST_LDARX 0x7c0000a8 #define PPC_INST_LSWI 0x7c0004aa #define PPC_INST_LSWX 0x7c00042a -#define PPC_INST_LWARX 0x7c000029 +#define PPC_INST_LWARX 0x7c000028 #define PPC_INST_LWSYNC 0x7c2004ac #define PPC_INST_LXVD2X 0x7c000698 #define PPC_INST_MCRXR 0x7c000400 @@ -62,8 +62,8 @@ #define __PPC_T_TLB(t) (((t) & 0x3) << 21) #define __PPC_WC(w) (((w) & 0x3) << 21) /* - * Only use the larx hint bit on 64bit CPUs. Once we verify it doesn't have - * any side effects on all 32bit processors, we can do this all the time. + * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a + * larx with EH set as an illegal instruction. */ #ifdef CONFIG_PPC64 #define __PPC_EH(eh) (((eh) & 0x1) << 0) |