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| author | Will Deacon | 2018-12-13 17:06:14 +0100 |
|---|---|---|
| committer | Marc Zyngier | 2018-12-19 18:47:52 +0100 |
| commit | df655b75c43fba0f2621680ab261083297fd6d16 (patch) | |
| tree | cecc5ca40b3c50a183ec7994b869d882e99a65ec | |
| parent | KVM: arm/arm64: Fix unintended stage 2 PMD mappings (diff) | |
| download | kernel-qcow2-linux-df655b75c43fba0f2621680ab261083297fd6d16.tar.gz kernel-qcow2-linux-df655b75c43fba0f2621680ab261083297fd6d16.tar.xz kernel-qcow2-linux-df655b75c43fba0f2621680ab261083297fd6d16.zip | |
arm64: KVM: Avoid setting the upper 32 bits of VTCR_EL2 to 1
Although bit 31 of VTCR_EL2 is RES1, we inadvertently end up setting all
of the upper 32 bits to 1 as well because we define VTCR_EL2_RES1 as
signed, which is sign-extended when assigning to kvm->arch.vtcr.
Lucky for us, the architecture currently treats these upper bits as RES0
so, whilst we've been naughty, we haven't set fire to anything yet.
Cc: <stable@vger.kernel.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
| -rw-r--r-- | arch/arm64/include/asm/kvm_arm.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index 9921bb7ab6d8..9c1a065b78ea 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h @@ -104,7 +104,7 @@ TCR_EL2_ORGN0_MASK | TCR_EL2_IRGN0_MASK | TCR_EL2_T0SZ_MASK) /* VTCR_EL2 Registers bits */ -#define VTCR_EL2_RES1 (1 << 31) +#define VTCR_EL2_RES1 (1U << 31) #define VTCR_EL2_HD (1 << 22) #define VTCR_EL2_HA (1 << 21) #define VTCR_EL2_PS_SHIFT TCR_EL2_PS_SHIFT |