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| author | Joseph Lo | 2019-01-04 04:07:00 +0100 |
|---|---|---|
| committer | Thierry Reding | 2019-02-07 19:03:56 +0100 |
| commit | f9c8bcc00290e7b46188fc9e87aaec0ebeba0286 (patch) | |
| tree | 772c633e7e52cd986856ae4614f331a51c2dde50 | |
| parent | arm64: tegra: Enable DFLL clock on Jetson TX1 (diff) | |
| download | kernel-qcow2-linux-f9c8bcc00290e7b46188fc9e87aaec0ebeba0286.tar.gz kernel-qcow2-linux-f9c8bcc00290e7b46188fc9e87aaec0ebeba0286.tar.xz kernel-qcow2-linux-f9c8bcc00290e7b46188fc9e87aaec0ebeba0286.zip | |
arm64: tegra: Add CPU power rail regulator on Smaug
Add CPU power rail regulator for Smaug board.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts index ed04526f6252..9a8f6b021323 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts @@ -1340,6 +1340,25 @@ status = "okay"; clock-frequency = <1000000>; + max77621_cpu: max77621@1b { + compatible = "maxim,max77621"; + reg = <0x1b>; + interrupt-parent = <&gpio>; + interrupts = <TEGRA_GPIO(Y, 1) IRQ_TYPE_LEVEL_LOW>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1231250>; + regulator-name = "PPVAR_CPU"; + regulator-ramp-delay = <12500>; + maxim,dvs-default-state = <1>; + maxim,enable-active-discharge; + maxim,enable-bias-control; + maxim,enable-etr; + maxim,enable-gpio = <&max77620 5 0>; + maxim,externally-enable; + }; + max77620: max77620@3c { compatible = "maxim,max77620"; reg = <0x3c>; |