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authorSteve Capper2018-01-11 11:11:59 +0100
committerCatalin Marinas2018-01-14 19:49:52 +0100
commit0370b31e48454d8cf11120664aedd1c51b3004cb (patch)
tree343ee02500bf2154425f058c51e7af107a10635f /Documentation/arm64
parentarm64: entry: Move the trampoline to be before PAN (diff)
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arm64: Extend early page table code to allow for larger kernels
Currently the early assembler page table code assumes that precisely 1xpgd, 1xpud, 1xpmd are sufficient to represent the early kernel text mappings. Unfortunately this is rarely the case when running with a 16KB granule, and we also run into limits with 4KB granule when building much larger kernels. This patch re-writes the early page table logic to compute indices of mappings for each level of page table, and if multiple indices are required, the next-level page table is scaled up accordingly. Also the required size of the swapper_pg_dir is computed at link time to cover the mapping [KIMAGE_ADDR + VOFFSET, _end]. When KASLR is enabled, an extra page is set aside for each level that may require extra entries at runtime. Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Steve Capper <steve.capper@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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