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authorDavid S. Miller2019-05-31 19:49:43 +0200
committerDavid S. Miller2019-05-31 19:49:43 +0200
commitb4b12b0d2f02613101a7a667ef7b7cc8d388e597 (patch)
treeae2d52198929797821961fd0b5923b5ea1a89fe1 /Documentation/devicetree/bindings/arm/cpu-capacity.txt
parentnetfilter: nf_conntrack_bridge: fix CONFIG_IPV6=y (diff)
parentMerge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net (diff)
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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
The phylink conflict was between a bug fix by Russell King to make sure we have a consistent PHY interface mode, and a change in net-next to pull some code in phylink_resolve() into the helper functions phylink_mac_link_{up,down}() On the dp83867 side it's mostly overlapping changes, with the 'net' side removing a condition that was supposed to trigger for RGMII but because of how it was coded never actually could trigger. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/cpu-capacity.txt')
-rw-r--r--Documentation/devicetree/bindings/arm/cpu-capacity.txt12
1 files changed, 6 insertions, 6 deletions
diff --git a/Documentation/devicetree/bindings/arm/cpu-capacity.txt b/Documentation/devicetree/bindings/arm/cpu-capacity.txt
index 96fa46cb133c..380e21c5fc7e 100644
--- a/Documentation/devicetree/bindings/arm/cpu-capacity.txt
+++ b/Documentation/devicetree/bindings/arm/cpu-capacity.txt
@@ -118,7 +118,7 @@ cpus {
};
A57_0: cpu@0 {
- compatible = "arm,cortex-a57","arm,armv8";
+ compatible = "arm,cortex-a57";
reg = <0x0 0x0>;
device_type = "cpu";
enable-method = "psci";
@@ -129,7 +129,7 @@ cpus {
};
A57_1: cpu@1 {
- compatible = "arm,cortex-a57","arm,armv8";
+ compatible = "arm,cortex-a57";
reg = <0x0 0x1>;
device_type = "cpu";
enable-method = "psci";
@@ -140,7 +140,7 @@ cpus {
};
A53_0: cpu@100 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x100>;
device_type = "cpu";
enable-method = "psci";
@@ -151,7 +151,7 @@ cpus {
};
A53_1: cpu@101 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x101>;
device_type = "cpu";
enable-method = "psci";
@@ -162,7 +162,7 @@ cpus {
};
A53_2: cpu@102 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x102>;
device_type = "cpu";
enable-method = "psci";
@@ -173,7 +173,7 @@ cpus {
};
A53_3: cpu@103 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x103>;
device_type = "cpu";
enable-method = "psci";