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authorOlof Johansson2013-04-13 08:04:54 +0200
committerOlof Johansson2013-04-13 08:05:08 +0200
commitbf049ded36b2178e80bb9f227d4490714d838c11 (patch)
tree39b81f33a56bb96551d3d2f24bf075af839f994d /Documentation/devicetree/bindings/clock/exynos5440-clock.txt
parentMerge tag 'omap-for-v3.10/dt-signed-v2' of git://git.kernel.org/pub/scm/linux... (diff)
parentARM: dts: add PDMA0 changes for exynos5440 (diff)
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Merge tag 'dt-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt2
update device tree for exynos4 and exynos5 * tag 'dt-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (125 commits) ARM: dts: add PDMA0 changes for exynos5440 ARM: dts: Add cpufreq controller node for Exynos5440 SoC ARM: dts: Fix gmac clock ids due to changes in Exynos5440 ARM: dts: add device tree file for SD5v1 board ARM: dts: update bootargs to boot from sda2 for exynos5440-ssdk5440 ARM: dts: add PMU support in exynos5440 ARM: dts: Add node for GMAC for exynos5440 ARM: dts: list the interrupts generated by pin-controller on Exynos5440 ARM: dts: Add FIMD DT binding Documentation ARM: dts: Add FIMD node and display timing node to exynos4412-origen.dts ARM: dts: Add FIMD node to exynos4 ARM: dts: Add SYSREG block node for S5P/Exynos4 SoC series ARM: dts: Add display timing node to exynos5250-smdk5250.dts ARM: dts: Add FIMD node to exynos5 ARM: dts: Add virtual GIC DT bindings for exynos5440 ARM: dts: Document usb clocks in samsung,exynos4210-ehci/ohci bindings ARM: dts: add usb 2.0 clock references to exynos5250 device tree ARM: dts: Add architected timer nodes for exynos5250 ARM: dts: Declare the gic as a15 compatible for exynos5250 ARM: dts: Add HDMI HPD and regulator node for Arndale board ... Signed-off-by: Olof Johansson <olof@lixom.net>
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+* Samsung Exynos5440 Clock Controller
+
+The Exynos5440 clock controller generates and supplies clock to various
+controllers within the Exynos5440 SoC.
+
+Required Properties:
+
+- comptible: should be "samsung,exynos5440-clock".
+
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+- #clock-cells: should be 1.
+
+The following is the list of clocks generated by the controller. Each clock is
+assigned an identifier and client nodes use this identifier to specify the
+clock which they consume.
+
+
+ [Core Clocks]
+
+ Clock ID
+ ----------------------------
+
+ xtal 1
+ arm_clk 2
+
+ [Peripheral Clock Gates]
+
+ Clock ID
+ ----------------------------
+
+ spi_baud 16
+ pb0_250 17
+ pr0_250 18
+ pr1_250 19
+ b_250 20
+ b_125 21
+ b_200 22
+ sata 23
+ usb 24
+ gmac0 25
+ cs250 26
+ pb0_250_o 27
+ pr0_250_o 28
+ pr1_250_o 29
+ b_250_o 30
+ b_125_o 31
+ b_200_o 32
+ sata_o 33
+ usb_o 34
+ gmac0_o 35
+ cs250_o 36
+
+Example: An example of a clock controller node is listed below.
+
+ clock: clock-controller@0x10010000 {
+ compatible = "samsung,exynos5440-clock";
+ reg = <0x160000 0x10000>;
+ #clock-cells = <1>;
+ };