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authorSergej Sawazki2015-05-11 10:44:59 +0200
committerMichael Turquette2015-05-13 20:52:06 +0200
commit45b03d3e88c2068644e377cf08fc480208700b85 (patch)
tree05b82e082bd7f9b607a46625897dbe3fef106640 /Documentation/devicetree/bindings/clock
parentclk: si5351: fix .round_rate for multisynth 6-7 (diff)
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clk: si5351: fix .recalc_rate for multisynth 6-7
MS6 and MS7 do not have the MSx_P3 field. Do the 'params.p3 == 0' check for MS0-M5 only. See [AN619, p. 6] for details. Referenced document: [AN619] Manually Generating an Si5351 Register Map, Rev. 0.4 Signed-off-by: Sergej Sawazki <ce3a@gmx.de> Signed-off-by: Michael Turquette <mturquette@linaro.org>
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