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author | Icenowy Zheng | 2018-03-16 15:02:09 +0100 |
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committer | Linus Walleij | 2018-03-27 15:07:49 +0200 |
commit | 35817d34bd07b4e1cd597e054fa2bd9c9c111aab (patch) | |
tree | 4e0c17938c4a90cff2b3f1dbe127d5760629b7d8 /Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt | |
parent | pinctrl: sunxi: introduce IRQ bank conversion function (diff) | |
download | kernel-qcow2-linux-35817d34bd07b4e1cd597e054fa2bd9c9c111aab.tar.gz kernel-qcow2-linux-35817d34bd07b4e1cd597e054fa2bd9c9c111aab.tar.xz kernel-qcow2-linux-35817d34bd07b4e1cd597e054fa2bd9c9c111aab.zip |
pinctrl: sunxi: change irq_bank_base to irq_bank_map
The Allwinner H6 SoC have its pin controllers with the first IRQ-capable
GPIO bank at IRQ bank 1 and the second bank at IRQ bank 5.
Change the current code that uses IRQ bank base to a IRQ bank map, in
order to support the case that holes exist among IRQ banks.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt')
0 files changed, 0 insertions, 0 deletions