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| author | Dinh Nguyen | 2015-07-24 21:05:06 +0200 |
|---|---|---|
| committer | Dinh Nguyen | 2015-08-10 04:58:46 +0200 |
| commit | 1a94acf858000836d28b13942eebf5cbffc9ac34 (patch) | |
| tree | 48316910edaca59122755a7f544dacb313473a76 /Documentation/devicetree/bindings/reset/socfpga-reset.txt | |
| parent | dt-bindings: Add reset manager offsets for Arria10 (diff) | |
| download | kernel-qcow2-linux-1a94acf858000836d28b13942eebf5cbffc9ac34.tar.gz kernel-qcow2-linux-1a94acf858000836d28b13942eebf5cbffc9ac34.tar.xz kernel-qcow2-linux-1a94acf858000836d28b13942eebf5cbffc9ac34.zip | |
ARM: socfpga: dts: add "altr,modrst-offset" property
The "altr,modrst-offset" property represents the offset into the reset manager
that is the first register to be used by the driver to bring peripherals out
of reset.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'Documentation/devicetree/bindings/reset/socfpga-reset.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/reset/socfpga-reset.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/reset/socfpga-reset.txt b/Documentation/devicetree/bindings/reset/socfpga-reset.txt index 32c1c8bfd5dc..98c9f560e5c5 100644 --- a/Documentation/devicetree/bindings/reset/socfpga-reset.txt +++ b/Documentation/devicetree/bindings/reset/socfpga-reset.txt @@ -3,6 +3,7 @@ Altera SOCFPGA Reset Manager Required properties: - compatible : "altr,rst-mgr" - reg : Should contain 1 register ranges(address and length) +- altr,modrst-offset : Should contain the offset of the first modrst register. - #reset-cells: 1 Example: @@ -10,4 +11,5 @@ Example: #reset-cells = <1>; compatible = "altr,rst-mgr"; reg = <0xffd05000 0x1000>; + altr,modrst-offset = <0x10>; }; |