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| author | Vineet Gupta | 2016-10-01 01:13:28 +0200 |
|---|---|---|
| committer | Vineet Gupta | 2016-12-14 18:23:46 +0100 |
| commit | 107177b14d8179f864315fc4daed9da777ed30c2 (patch) | |
| tree | bf549522914db856961b39e9e12e3fc8654db3d9 /Documentation/features | |
| parent | ARCv2: entry: document intr disable in hard isr (diff) | |
| download | kernel-qcow2-linux-107177b14d8179f864315fc4daed9da777ed30c2.tar.gz kernel-qcow2-linux-107177b14d8179f864315fc4daed9da777ed30c2.tar.xz kernel-qcow2-linux-107177b14d8179f864315fc4daed9da777ed30c2.zip | |
ARCv2: intc: default all interrupts to priority 1
ARC HS Cores support configurable multiple interrupt priorities of upto
16 levels. In commit dec2b2849cfcc ("ARCv2: intc: Allow interruption by
lowest priority interrupt") we switched to 15 which seems a bit
excessive given that there would be rare hardware implementing so many
preemption levels AND running Linux. It would seem that 2 levels will be
more common so switch to 1 as the default priority level. This will be
the "lower" priority level saving 0 for implementing NMI style support.
This scheme also works in systems with more than 2 prioity levels as
well.
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'Documentation/features')
0 files changed, 0 insertions, 0 deletions