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author | Vinod Koul | 2014-04-05 17:15:55 +0200 |
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committer | Vinod Koul | 2014-04-05 17:15:55 +0200 |
commit | 8673bcef8c1b07b83e9ee02d5e7f4b66507b03cd (patch) | |
tree | bc08b79fe11c4745434da1cebc5fb8936f9c6831 /Documentation | |
parent | shdma: add R-Car Audio DMAC peri peri driver (diff) | |
parent | dmaengine: add Qualcomm BAM dma driver (diff) | |
download | kernel-qcow2-linux-8673bcef8c1b07b83e9ee02d5e7f4b66507b03cd.tar.gz kernel-qcow2-linux-8673bcef8c1b07b83e9ee02d5e7f4b66507b03cd.tar.xz kernel-qcow2-linux-8673bcef8c1b07b83e9ee02d5e7f4b66507b03cd.zip |
Merge branch 'topic/bam' into for-linus
Conflicts:
drivers/dma/Makefile
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/dma/qcom_bam_dma.txt | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt b/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt new file mode 100644 index 000000000000..d75a9d767022 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt @@ -0,0 +1,41 @@ +QCOM BAM DMA controller + +Required properties: +- compatible: must contain "qcom,bam-v1.4.0" for MSM8974 +- reg: Address range for DMA registers +- interrupts: Should contain the one interrupt shared by all channels +- #dma-cells: must be <1>, the cell in the dmas property of the client device + represents the channel number +- clocks: required clock +- clock-names: must contain "bam_clk" entry +- qcom,ee : indicates the active Execution Environment identifier (0-7) used in + the secure world. + +Example: + + uart-bam: dma@f9984000 = { + compatible = "qcom,bam-v1.4.0"; + reg = <0xf9984000 0x15000>; + interrupts = <0 94 0>; + clocks = <&gcc GCC_BAM_DMA_AHB_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + }; + +DMA clients must use the format described in the dma.txt file, using a two cell +specifier for each channel. + +Example: + serial@f991e000 { + compatible = "qcom,msm-uart"; + reg = <0xf991e000 0x1000> + <0xf9944000 0x19000>; + interrupts = <0 108 0>; + clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + + dmas = <&uart-bam 0>, <&uart-bam 1>; + dma-names = "rx", "tx"; + }; |