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| author | Ondrej Zary | 2011-05-16 21:38:08 +0200 |
|---|---|---|
| committer | H. Peter Anvin | 2011-05-16 22:24:21 +0200 |
| commit | 865be7a81071a77014c83cd01536c989eed362b4 (patch) | |
| tree | 4fd71b4c50c40b174ea728f79a4301d765c4b88c /MAINTAINERS | |
| parent | Documentation, ABI: Update L3 cache index disable text (diff) | |
| download | kernel-qcow2-linux-865be7a81071a77014c83cd01536c989eed362b4.tar.gz kernel-qcow2-linux-865be7a81071a77014c83cd01536c989eed362b4.tar.xz kernel-qcow2-linux-865be7a81071a77014c83cd01536c989eed362b4.zip | |
x86, cpu: Fix detection of Celeron Covington stepping A1 and B0
Steppings A1 and B0 of Celeron Covington are currently misdetected as
Pentium II (Dixon). Fix it by removing the stepping check.
[ hpa: this fixes this specific bug... the CPUID documentation
specifies that the L2 cache size can disambiguate additional CPUs;
this patch does not fix that. ]
Signed-off-by: Ondrej Zary <linux@rainbow-software.org>
Link: http://lkml.kernel.org/r/201105162138.15416.linux@rainbow-software.org
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'MAINTAINERS')
0 files changed, 0 insertions, 0 deletions