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| author | Vineet Gupta | 2015-02-06 16:44:57 +0100 |
|---|---|---|
| committer | Vineet Gupta | 2015-10-29 14:11:30 +0100 |
| commit | 5a364c2a1762e8a78721fafc93144509c0b6cb84 (patch) | |
| tree | dc74e67f8908cbfe0c5753515c8097339d55dc80 /arch/arc/include/asm/cache.h | |
| parent | ARC: mm: PAE40: tlbex.S: Explicitify the size of pte_t (diff) | |
| download | kernel-qcow2-linux-5a364c2a1762e8a78721fafc93144509c0b6cb84.tar.gz kernel-qcow2-linux-5a364c2a1762e8a78721fafc93144509c0b6cb84.tar.xz kernel-qcow2-linux-5a364c2a1762e8a78721fafc93144509c0b6cb84.zip | |
ARC: mm: PAE40 support
This is the first working implementation of 40-bit physical address
extension on ARCv2.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/include/asm/cache.h')
| -rw-r--r-- | arch/arc/include/asm/cache.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h index e23ea6e7633a..abf06e81c929 100644 --- a/arch/arc/include/asm/cache.h +++ b/arch/arc/include/asm/cache.h @@ -65,6 +65,7 @@ extern int ioc_exists; #if defined(CONFIG_ARC_MMU_V3) || defined(CONFIG_ARC_MMU_V4) #define ARC_REG_IC_PTAG 0x1E #endif +#define ARC_REG_IC_PTAG_HI 0x1F /* Bit val in IC_CTRL */ #define IC_CTRL_CACHE_DISABLE 0x1 @@ -77,6 +78,7 @@ extern int ioc_exists; #define ARC_REG_DC_FLSH 0x4B #define ARC_REG_DC_FLDL 0x4C #define ARC_REG_DC_PTAG 0x5C +#define ARC_REG_DC_PTAG_HI 0x5F /* Bit val in DC_CTRL */ #define DC_CTRL_INV_MODE_FLUSH 0x40 |