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authorVineet Gupta2014-11-13 11:17:46 +0100
committerVineet Gupta2014-12-12 11:32:46 +0100
commit88ec11b0f82b517b4f1c13f57096db5c8872fccb (patch)
treef119899229726c594668a6ac4c50df6a79cbcaca /arch/arc/include/asm/irqflags.h
parentARC: R-M-W assist locks only needed for !LLSC (diff)
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ARC: document memory clobber in irq control macros
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/include/asm/irqflags.h')
-rw-r--r--arch/arc/include/asm/irqflags.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arc/include/asm/irqflags.h b/arch/arc/include/asm/irqflags.h
index 742816f1b210..27ecc6975a58 100644
--- a/arch/arc/include/asm/irqflags.h
+++ b/arch/arc/include/asm/irqflags.h
@@ -41,6 +41,15 @@
/******************************************************************
* IRQ Control Macros
+ *
+ * All of them have "memory" clobber (compiler barrier) which is needed to
+ * ensure that LD/ST requiring irq safetly (R-M-W when LLSC is not available)
+ * are redone after IRQs are re-enabled (and gcc doesn't reuse stale register)
+ *
+ * Noted at the time of Abilis Timer List corruption
+ * Orig Bug + Rejected solution : https://lkml.org/lkml/2013/3/29/67
+ * Reasoning : https://lkml.org/lkml/2013/4/8/15
+ *
******************************************************************/
/*