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| author | Russell King | 2015-04-03 00:58:55 +0200 |
|---|---|---|
| committer | Russell King | 2015-04-14 23:26:52 +0200 |
| commit | e5a5de4447471ab1a01585f075400c2be36e2cb6 (patch) | |
| tree | b66671a44c142bed1cfbc0b7f0bd782ee61eb599 /arch/arm/Kconfig | |
| parent | ARM: cache-v7: optimise test for Cortex A9 r0pX devices (diff) | |
| download | kernel-qcow2-linux-e5a5de4447471ab1a01585f075400c2be36e2cb6.tar.gz kernel-qcow2-linux-e5a5de4447471ab1a01585f075400c2be36e2cb6.tar.xz kernel-qcow2-linux-e5a5de4447471ab1a01585f075400c2be36e2cb6.zip | |
ARM: enable ARM errata 643719 workaround by default
The effects of not having ARM errata 643719 enabled on affected CPUs
can be very confusing and hard to debug. Rather than leave this to
chance, enable this workaround by default. Now that we have rearranged
the code, it should have a low impact on the majority of CPUs.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/Kconfig')
| -rw-r--r-- | arch/arm/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 35fed4b1ebd8..bca01e280bbe 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1127,6 +1127,7 @@ config ARM_ERRATA_742231 config ARM_ERRATA_643719 bool "ARM errata: LoUIS bit field in CLIDR register is incorrect" depends on CPU_V7 && SMP + default y help This option enables the workaround for the 643719 Cortex-A9 (prior to r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR |