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authorLokesh Vutla2016-02-24 11:11:04 +0100
committerTony Lindgren2016-03-01 00:02:15 +0100
commitdae320ec31736865d22bfac78717726b6545ff41 (patch)
tree727c00770423f7513af069014f376aa65eb89c0a /arch/arm/boot/dts/am57xx-cl-som-am57x.dts
parentARM: dts: omap3-sniper: USB OTG support (diff)
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ARM: dts: DRA7: change address-cells and size-cells
DRA7 SoC has the capability to support DDR memory upto 4GB. In order to represent this in memory dt node, the address-cells and size cells should be 2. So, changing the address-cells and size-cells to 2 and updating the memory nodes accordingly. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/am57xx-cl-som-am57x.dts')
-rw-r--r--arch/arm/boot/dts/am57xx-cl-som-am57x.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
index c53882643ae9..e6c40db3023b 100644
--- a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
+++ b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
@@ -21,7 +21,7 @@
memory {
device_type = "memory";
- reg = <0x80000000 0x20000000>; /* 512 MB - minimal configuration */
+ reg = <0x0 0x80000000 0x0 0x20000000>; /* 512 MB - minimal configuration */
};
leds {