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authorJon Mason2015-11-02 19:40:57 +0100
committerFlorian Fainelli2015-11-16 19:48:54 +0100
commit41254754aa03ed8c223094799f1d3779c442aae4 (patch)
tree68452fcce508cf7207ae9684b9e44943ca3e5e95 /arch/arm/boot/dts/bcm-nsp.dtsi
parentARM: dts: NSP: Add PCI support (diff)
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ARM: dts: NSP: Add NAND Support to DT
Add NAND support to the device tree for the Broadcom Northstar Plus SoC. Since no driver changes are needed to enable this hardware, only the device tree changes are required to make this functional. Signed-off-by: Jon Mason <jonmason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/bcm-nsp.dtsi')
-rw-r--r--arch/arm/boot/dts/bcm-nsp.dtsi16
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 85fb1c8a2421..62bc86fca958 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -96,7 +96,7 @@
axi {
compatible = "simple-bus";
- ranges = <0x00000000 0x18000000 0x00015000>;
+ ranges = <0x00000000 0x18000000 0x0011ba08>;
#address-cells = <1>;
#size-cells = <1>;
@@ -187,5 +187,19 @@
status = "disabled";
};
+
+ nand: nand@18026000 {
+ compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
+ reg = <0x026000 0x600>,
+ <0x11b408 0x600>,
+ <0x026f00 0x20>;
+ reg-names = "nand", "iproc-idm", "iproc-ext";
+ interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ brcm,nand-has-wp;
+ };
};
};