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| author | Martin Blumenstingl | 2017-06-15 23:33:49 +0200 |
|---|---|---|
| committer | Kevin Hilman | 2017-06-16 21:07:11 +0200 |
| commit | a35910d3994a6d1f59b140dea6b00b8a7b134878 (patch) | |
| tree | 92de4749ebd18c93f23c5febc6ee64a848d2cc21 /arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dts | |
| parent | ARM: dts: meson8: add reserved memory zones (diff) | |
| download | kernel-qcow2-linux-a35910d3994a6d1f59b140dea6b00b8a7b134878.tar.gz kernel-qcow2-linux-a35910d3994a6d1f59b140dea6b00b8a7b134878.tar.xz kernel-qcow2-linux-a35910d3994a6d1f59b140dea6b00b8a7b134878.zip | |
ARM: dts: meson: add the hardware random number generator
All supported Meson SoCs have a random number generator in CBUS.
Newer SoCs (GXBB, GXL and GXM) provide only one 32-bit random number
register, whereas the older SoCs (Meson6, Meson8 and Meson8b) have two
32-bit random number registers. The existing meson-rng driver only
supports the lower 32-bit - but it still works fine on the older SoCs
apart from this small limitation.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dts')
0 files changed, 0 insertions, 0 deletions