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authorFabio Estevam2016-04-25 21:38:48 +0200
committerShawn Guo2016-04-26 13:52:17 +0200
commitfe4266baba600218e076e01bc446e36f30e85d29 (patch)
tree3e3b53f2b8bc52ed23fcf0a8191e5209ce5d6069 /arch/arm/boot/dts/imx6sx.dtsi
parentARM: dts: imx6ul: Fix operating points (diff)
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ARM: dts: imx6sx: Add 198MHz operating point
198MHz is a valid operating point for mx6sx. Add entries for VDD_ARM_CAP and VDD_SOC_CAP voltages for 198MHz according to the imx6sx datahseet: http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SXIEC.pdf (a 25mV offset is added to the minimum allowed values for safety). These values also match the ones from the NXP kernel. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6sx.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6sx.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index d02ab324c7ba..6a993bfda248 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -63,12 +63,14 @@
996000 1250000
792000 1175000
396000 1075000
+ 198000 975000
>;
fsl,soc-operating-points = <
/* ARM kHz SOC uV */
996000 1175000
792000 1175000
396000 1175000
+ 198000 1175000
>;
clock-latency = <61036>; /* two CLK32 periods */
clocks = <&clks IMX6SX_CLK_ARM>,