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| author | Heiko Stuebner | 2014-09-13 00:34:29 +0200 |
|---|---|---|
| committer | Heiko Stuebner | 2014-10-20 11:52:24 +0200 |
| commit | be8a77c54815b311485a348547ec80803ee9415b (patch) | |
| tree | 772c123f75d053a75e81f35fe4c87b3b963cfe0d /arch/arm/boot/dts/rk3288.dtsi | |
| parent | Linux 3.18-rc1 (diff) | |
| download | kernel-qcow2-linux-be8a77c54815b311485a348547ec80803ee9415b.tar.gz kernel-qcow2-linux-be8a77c54815b311485a348547ec80803ee9415b.tar.xz kernel-qcow2-linux-be8a77c54815b311485a348547ec80803ee9415b.zip | |
ARM: dts: rockchip: add operating points and armclk references
Add basic OPP entries for current supported Rockchip SoCs.
The operating points are currently very conservative, so individual
boards may opt to redefine them.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm/boot/dts/rk3288.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 874e66dbb93b..cb18bb457568 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -47,10 +47,27 @@ #address-cells = <1>; #size-cells = <0>; - cpu@500 { + cpu0: cpu@500 { device_type = "cpu"; compatible = "arm,cortex-a12"; reg = <0x500>; + operating-points = < + /* KHz uV */ + 1608000 1350000 + 1512000 1300000 + 1416000 1200000 + 1200000 1100000 + 1008000 1050000 + 816000 1000000 + 696000 950000 + 600000 900000 + 408000 900000 + 312000 900000 + 216000 900000 + 126000 900000 + >; + clock-latency = <40000>; + clocks = <&cru ARMCLK>; }; cpu@501 { device_type = "cpu"; |