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| author | Thor Thayer | 2018-06-22 20:49:36 +0200 |
|---|---|---|
| committer | Dinh Nguyen | 2018-07-02 15:44:15 +0200 |
| commit | 84f95684d9503d7cff920c716b2c7fd5522217eb (patch) | |
| tree | 6cccc6014f84a846c0739d63d253d5aeda13d847 /arch/arm/boot/dts/socfpga_arria10.dtsi | |
| parent | arm64: dts: stratix10: add OCP reset property for ethernet (diff) | |
| download | kernel-qcow2-linux-84f95684d9503d7cff920c716b2c7fd5522217eb.tar.gz kernel-qcow2-linux-84f95684d9503d7cff920c716b2c7fd5522217eb.tar.xz kernel-qcow2-linux-84f95684d9503d7cff920c716b2c7fd5522217eb.zip | |
ARM: dts: Add SPI0 node for Arria10
Add the SPI0 node for Arria10.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/socfpga_arria10.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/socfpga_arria10.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index 791ca15c799e..a4dcb68f4322 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -587,6 +587,18 @@ status = "disabled"; }; + spi0: spi@ffda4000 { + compatible = "snps,dw-apb-ssi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xffda4000 0x100>; + interrupts = <0 101 4>; + num-cs = <4>; + /*32bit_access;*/ + clocks = <&spi_m_clk>; + status = "disabled"; + }; + spi1: spi@ffda5000 { compatible = "snps,dw-apb-ssi"; #address-cells = <1>; |