Merge tag 'late-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC late changes from Arnd Bergmann:
 "These are changes that arrived a little late before the merge window
  or that have multiple dependencies on previous branches so they did
  not fit into one of the earlier ones.  There are 10 branches merged
  here, a total of 39 non-merge commits.  Contents are a mixed bag for
  the above reasons:

   * Two new SoC platforms: ST microelectronics stixxxx and the TI
     'Nspire' graphing calculator.  These should have been in the 'soc'
     branch but were a little late
   * Support for the Exynos 5420 variant in mach-exynos, which is based
     on the other exynos branches to avoid conflicts.
   * Various small changes for sh-mobile, ux500 and davinci
   * Common clk support for MSM"

* tag 'late-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits)
  ARM: ux500: bail out on alien cpus
  ARM: davinci: da850: adopt to pinctrl-single change for configuring multiple pins
  serial: sh-sci: Initialise variables before access in sci_set_termios()
  ARM: stih41x: Add B2020 board support
  ARM: stih41x: Add B2000 board support
  ARM: sti: Add DEBUG_LL console support
  ARM: sti: Add STiH416 SOC support
  ARM: sti: Add STiH415 SOC support
  ARM: msm: Migrate to common clock framework
  ARM: msm: Make proc_comm clock control into a platform driver
  ARM: msm: Prepare clk_get() users in mach-msm for clock-pcom driver
  ARM: msm: Remove clock-7x30.h include file
  ARM: msm: Remove custom clk_set_{max,min}_rate() API
  ARM: msm: Remove custom clk_set_flags() API
  msm: iommu: Use clk_set_rate() instead of clk_set_min_rate()
  msm: iommu: Convert to clk_prepare/unprepare
  msm_sdcc: Convert to clk_prepare/unprepare
  usb: otg: msm: Convert to clk_prepare/unprepare
  msm_serial: Use devm_clk_get() and properly return errors
  msm_serial: Convert to clk_prepare/unprepare
  ...

1 files changed, 71 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/st-pincfg.h b/arch/arm/boot/dts/st-pincfg.h
new file mode 100644
index 000000000000..8c45d85ac13e
--- /dev/null
+++ b/arch/arm/boot/dts/st-pincfg.h
@@ -0,0 +1,71 @@
+#ifndef _ST_PINCFG_H_
+#define _ST_PINCFG_H_
+
+/* Alternate functions */
+#define ALT1	1
+#define ALT2	2
+#define ALT3	3
+#define ALT4	4
+#define ALT5	5
+#define ALT6	6
+#define ALT7	7
+
+/* Output enable */
+#define OE			(1 << 27)
+/* Pull Up */
+#define PU			(1 << 26)
+/* Open Drain */
+#define OD			(1 << 26)
+#define RT			(1 << 23)
+#define INVERTCLK		(1 << 22)
+#define CLKNOTDATA		(1 << 21)
+#define DOUBLE_EDGE		(1 << 20)
+#define CLK_A			(0 << 18)
+#define CLK_B			(1 << 18)
+#define CLK_C			(2 << 18)
+#define CLK_D			(3 << 18)
+
+/* User-frendly defines for Pin Direction */
+		/* oe = 0, pu = 0, od = 0 */
+#define IN			(0)
+		/* oe = 0, pu = 1, od = 0 */
+#define IN_PU			(PU)
+		/* oe = 1, pu = 0, od = 0 */
+#define OUT			(OE)
+		/* oe = 1, pu = 0, od = 1 */
+#define BIDIR			(OE | OD)
+		/* oe = 1, pu = 1, od = 1 */
+#define BIDIR_PU		(OE | PU | OD)
+
+/* RETIME_TYPE */
+/*
+ * B Mode
+ * Bypass retime with optional delay parameter
+ */
+#define BYPASS		(0)
+/*
+ * R0, R1, R0D, R1D modes
+ * single-edge data non inverted clock, retime data with clk
+ */
+#define SE_NICLK_IO	(RT)
+/*
+ * RIV0, RIV1, RIV0D, RIV1D modes
+ * single-edge data inverted clock, retime data with clk
+ */
+#define SE_ICLK_IO	(RT | INVERTCLK)
+/*
+ * R0E, R1E, R0ED, R1ED modes
+ * double-edge data, retime data with clk
+ */
+#define DE_IO		(RT | DOUBLE_EDGE)
+/*
+ * CIV0, CIV1 modes with inverted clock
+ * Retiming the clk pins will park clock & reduce the noise within the core.
+ */
+#define ICLK		(RT | CLKNOTDATA | INVERTCLK)
+/*
+ * CLK0, CLK1 modes with non-inverted clock
+ * Retiming the clk pins will park clock & reduce the noise within the core.
+ */
+#define NICLK		(RT | CLKNOTDATA)
+#endif /* _ST_PINCFG_H_ */