diff options
| author | Stefan Mavrodiev | 2017-08-28 08:32:42 +0200 |
|---|---|---|
| committer | Maxime Ripard | 2017-09-17 12:04:27 +0200 |
| commit | dd13cbf7fc3cccd03bfa86d9292d9b960eb1fa70 (patch) | |
| tree | 56829f11c089b3f391d558d8947c0b48afa3e291 /arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | |
| parent | ARM: dts: sun8i: h3: Enable AP6212 BT on uart3 on Nanopi M1 Plus (diff) | |
| download | kernel-qcow2-linux-dd13cbf7fc3cccd03bfa86d9292d9b960eb1fa70.tar.gz kernel-qcow2-linux-dd13cbf7fc3cccd03bfa86d9292d9b960eb1fa70.tar.xz kernel-qcow2-linux-dd13cbf7fc3cccd03bfa86d9292d9b960eb1fa70.zip | |
ARM: dts: sun7i: Fix A20-OLinuXino-MICRO dts for LAN8710
From revision J the board uses new phy chip LAN8710. Compared
with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
not to work. To fix this PA17 is muxed with GMAC function. This
makes the pin output-low.
This patch is compatible with earlier board revisions, since this
pin wasn't connected to phy.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts')
| -rw-r--r-- | arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts index a351ac7db388..fc9c5db52cd7 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts @@ -102,7 +102,7 @@ &gmac { pinctrl-names = "default"; - pinctrl-0 = <&gmac_pins_mii_a>; + pinctrl-0 = <&gmac_pins_mii_a>, <&gmac_txerr>; phy = <&phy1>; phy-mode = "mii"; status = "okay"; @@ -229,6 +229,11 @@ }; &pio { + gmac_txerr: gmac_txerr@0 { + pins = "PA17"; + function = "gmac"; + }; + mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 { pins = "PH11"; function = "gpio_in"; |