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authorJoonsoo Kim2013-02-09 05:52:45 +0100
committerRussell King2013-02-11 18:33:08 +0100
commit7c4e9ced424be4d36df6a3e3825763e97ee97607 (patch)
treed4d7622944fb13565d3b4409de9950477c9570a1 /arch/arm/include/asm/delay.h
parentLinux 3.8-rc7 (diff)
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ARM: 7643/1: sched: correct update_sched_clock()
If we want load epoch_cyc and epoch_ns atomically, we should update epoch_cyc_copy first of all. This notify reader that updating is in progress. If we update epoch_cyc first like as current implementation, there is subtle error case. Look at the below example. <Initial Condition> cyc = 9 ns = 900 cyc_copy = 9 == CASE 1 == <CPU A = reader> <CPU B = updater> write cyc = 10 read cyc = 10 read ns = 900 write ns = 1000 write cyc_copy = 10 read cyc_copy = 10 output = (10, 900) == CASE 2 == <CPU A = reader> <CPU B = updater> read cyc = 9 write cyc = 10 write ns = 1000 read ns = 1000 read cyc_copy = 9 write cyc_copy = 10 output = (9, 1000) If atomic read is ensured, output should be (9, 900) or (10, 1000). But, output in example case are not. So, change updating sequence in order to correct this problem. Cc: <stable@vger.kernel.org> Signed-off-by: Joonsoo Kim <iamjoonsoo.kim@lge.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include/asm/delay.h')
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